TMS320F28032PAGQ

{
  "slug": "tms320f28032pagq",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "tms320f28032pagq",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tms320f28032pagq.kicad_sym",
    "tms320f28032pagq.kicad_mod",
    "tms320f28032pagq.glb",
    "tms320f28032pagq.step",
    "tms320f28032pagq.lbr",
    "docs/hero.png",
    "docs/tms320f28032pagq-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tms320f28032pagq-hero.glb",
    "tms320f28032pagq-hero.overlay.json"
  ],
  "component": {
    "mpn": "TMS320F28032PAGQ",
    "manufacturer": "Texas Instruments",
    "package": "TQFP-64(10x10)",
    "pin_count": 64,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tms320f28033",
    "parts": {
      "symbol": "tms320f28032pagq.kicad_sym",
      "footprint": "tms320f28032pagq.kicad_mod",
      "model_3d": "tms320f28032pagq-hero.glb",
      "model_3d_plain": "tms320f28032pagq.glb",
      "model_3d_step": "tms320f28032pagq-etched.step",
      "model_3d_step_plain": "tms320f28032pagq.step",
      "lbr": "tms320f28032pagq.lbr"
    },
    "distributor_links": {
      "lcsc": "C2864995",
      "digikey": "TMS320F28032PAGQ-ND",
      "mouser": "595-TMS320F28032PAGQ"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T21:12:37Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "TMS320F28032PAGQ-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-TMS320F28032PAGQ",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "GPIO22/EQEP1S/LINTXA",
        "type": "bidirectional",
        "description": "GPIO22 (alternates: EQEP1 strobe I/O, LIN transmit output); internal pull-up is enabled after reset and inputs are not 5 V tolerant."
      },
      {
        "number": "2",
        "name": "GPIO32/SDAA/EPWMSYNCI/ADCSOCAO",
        "type": "bidirectional",
        "description": "GPIO32 (alternates: I2C-A data open-drain I/O, ePWM external sync input, ADC SOC-A output); inputs are not 5 V tolerant."
      },
      {
        "number": "3",
        "name": "GPIO33/SCLA/EPWMSYNCO/ADCSOCBO",
        "type": "bidirectional",
        "description": "GPIO33 (alternates: I2C-A clock open-drain I/O, ePWM external sync output, ADC SOC-B output); inputs are not 5 V tolerant."
      },
      {
        "number": "4",
        "name": "GPIO23/EQEP1I/LINRXA",
        "type": "bidirectional",
        "description": "GPIO23 (alternates: EQEP1 index I/O, LIN receive input); inputs are not 5 V tolerant."
      },
      {
        "number": "5",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital supply; with the internal VREG enabled a 1.2 µF (minimum) capacitor is required at each VDD pin, and an external 1.71 V to 1.995 V supply is used only when the VREG is disabled."
      },
      {
        "number": "6",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "7",
        "name": "XRS",
        "type": "bidirectional",
        "description": "Device reset input and watchdog reset output, open-drain with internal pull-up; a 2.2 kΩ to 10 kΩ resistor between XRS and VDDIO is required and any external noise filter capacitor should be 100 nF or less."
      },
      {
        "number": "8",
        "name": "TRST",
        "type": "input",
        "description": "JTAG test reset with internal pull-down that must be held low during normal device operation, with an external pull-up (typically 2.2 kΩ) recommended."
      },
      {
        "number": "9",
        "name": "ADCINA7",
        "type": "input",
        "description": "ADC group A channel 7 analog input with a 0 V to 3.3 V full-scale range when using the internal reference."
      },
      {
        "number": "10",
        "name": "ADCINA6/COMP3A/AIO6",
        "type": "input",
        "description": "ADC group A channel 6 analog input, also comparator 3A input and digital AIO6 (AIO pins have no internal pull-up)."
      },
      {
        "number": "11",
        "name": "ADCINA4/COMP2A/AIO4",
        "type": "input",
        "description": "ADC group A channel 4 analog input, also comparator 2A input and digital AIO4 (AIO pins have no internal pull-up)."
      },
      {
        "number": "12",
        "name": "ADCINA3",
        "type": "input",
        "description": "ADC group A channel 3 analog input with a 0 V to 3.3 V full-scale range when using the internal reference."
      },
      {
        "number": "13",
        "name": "ADCINA2/COMP1A/AIO2",
        "type": "input",
        "description": "ADC group A channel 2 analog input, also comparator 1A input and digital AIO2 (AIO pins have no internal pull-up)."
      },
      {
        "number": "14",
        "name": "ADCINA1",
        "type": "input",
        "description": "ADC group A channel 1 analog input with a 0 V to 3.3 V full-scale range when using the internal reference."
      },
      {
        "number": "15",
        "name": "ADCINA0/VREFHI",
        "type": "input",
        "description": "ADC group A channel 0 input shared with the external ADC reference high VREFHI; the two functions cannot be used at the same time and VREFHI must not exceed VDDA."
      },
      {
        "number": "16",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog supply, 2.97 V to 3.63 V, with a 2.2 µF (typical) capacitor placed near this pin."
      },
      {
        "number": "17",
        "name": "VSSA/VREFLO",
        "type": "power_in",
        "description": "Analog ground, which also serves as the ADC external reference low VREFLO; VREFLO is tied to VSSA internally on the 64-pin PAG package."
      },
      {
        "number": "18",
        "name": "ADCINB0",
        "type": "input",
        "description": "ADC group B channel 0 analog input with a 0 V to 3.3 V full-scale range when using the internal reference."
      },
      {
        "number": "19",
        "name": "ADCINB1",
        "type": "input",
        "description": "ADC group B channel 1 analog input with a 0 V to 3.3 V full-scale range when using the internal reference."
      },
      {
        "number": "20",
        "name": "ADCINB2/COMP1B/AIO10",
        "type": "input",
        "description": "ADC group B channel 2 analog input, also comparator 1B input and digital AIO10 (AIO pins have no internal pull-up)."
      },
      {
        "number": "21",
        "name": "ADCINB3",
        "type": "input",
        "description": "ADC group B channel 3 analog input with a 0 V to 3.3 V full-scale range when using the internal reference."
      },
      {
        "number": "22",
        "name": "ADCINB4/COMP2B/AIO12",
        "type": "input",
        "description": "ADC group B channel 4 analog input, also comparator 2B input and digital AIO12 (AIO pins have no internal pull-up)."
      },
      {
        "number": "23",
        "name": "ADCINB6/COMP3B/AIO14",
        "type": "input",
        "description": "ADC group B channel 6 analog input, also comparator 3B input and digital AIO14 (AIO pins have no internal pull-up)."
      },
      {
        "number": "24",
        "name": "ADCINB7",
        "type": "input",
        "description": "ADC group B channel 7 analog input with a 0 V to 3.3 V full-scale range when using the internal reference."
      },
      {
        "number": "25",
        "name": "GPIO31/CANTXA",
        "type": "bidirectional",
        "description": "GPIO31 (alternate: CAN-A transmit output); inputs are not 5 V tolerant."
      },
      {
        "number": "26",
        "name": "GPIO30/CANRXA",
        "type": "bidirectional",
        "description": "GPIO30 (alternate: CAN-A receive input); inputs are not 5 V tolerant."
      },
      {
        "number": "27",
        "name": "GPIO29/SCITXDA/SCLA/TZ3",
        "type": "bidirectional",
        "description": "GPIO29 (alternates: SCI transmit output, I2C-A clock open-drain I/O, trip-zone 3 input); inputs are not 5 V tolerant."
      },
      {
        "number": "28",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "29",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer and flash supply, 2.97 V to 3.63 V, with a decoupling capacitor placed on this pin."
      },
      {
        "number": "30",
        "name": "TEST2",
        "type": "bidirectional",
        "description": "Reserved for TI testing; this pin must be left unconnected."
      },
      {
        "number": "31",
        "name": "GPIO9/EPWM5B/LINTXA/HRCAP1",
        "type": "bidirectional",
        "description": "GPIO9 (alternates: ePWM5B output, LIN transmit output, high-resolution capture input 1); inputs are not 5 V tolerant."
      },
      {
        "number": "32",
        "name": "GPIO28/SCIRXDA/SDAA/TZ2",
        "type": "bidirectional",
        "description": "GPIO28 (alternates: SCI receive input, I2C-A data open-drain I/O, trip-zone 2 input); inputs are not 5 V tolerant."
      },
      {
        "number": "33",
        "name": "GPIO18/SPICLKA/LINTXA/XCLKOUT",
        "type": "bidirectional",
        "description": "GPIO18 (alternates: SPI-A clock I/O, LIN transmit output, XCLKOUT output); reset default is GPIO input."
      },
      {
        "number": "34",
        "name": "GPIO17/SPISOMIA/TZ3",
        "type": "bidirectional",
        "description": "GPIO17 (alternates: SPI-A slave output/master input, trip-zone 3 input); inputs are not 5 V tolerant."
      },
      {
        "number": "35",
        "name": "GPIO8/EPWM5A/ADCSOCAO",
        "type": "bidirectional",
        "description": "GPIO8 (alternates: ePWM5A output with HRPWM channel, ADC SOC-A output); inputs are not 5 V tolerant."
      },
      {
        "number": "36",
        "name": "GPIO16/SPISIMOA/TZ2",
        "type": "bidirectional",
        "description": "GPIO16 (alternates: SPI-A slave input/master output, trip-zone 2 input); inputs are not 5 V tolerant."
      },
      {
        "number": "37",
        "name": "GPIO12/TZ1/SCITXDA",
        "type": "bidirectional",
        "description": "GPIO12 (alternates: trip-zone 1 input, SCI transmit output); the SPI-B alternate is not available on the PAG package."
      },
      {
        "number": "38",
        "name": "GPIO7/EPWM4B/SCIRXDA",
        "type": "bidirectional",
        "description": "GPIO7 (alternates: ePWM4B output, SCI receive input); inputs are not 5 V tolerant."
      },
      {
        "number": "39",
        "name": "GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO",
        "type": "bidirectional",
        "description": "GPIO6 (alternates: ePWM4A output with HRPWM channel, external ePWM sync input and output); inputs are not 5 V tolerant."
      },
      {
        "number": "40",
        "name": "X2",
        "type": "output",
        "description": "On-chip crystal oscillator output that must be connected to a crystal or ceramic resonator across X1/X2, or left unconnected if unused."
      },
      {
        "number": "41",
        "name": "X1",
        "type": "input",
        "description": "1.8 V on-chip crystal oscillator input that must never be driven with a 3.3 V signal; connect to GND if unused."
      },
      {
        "number": "42",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "43",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital supply; requires a 1.2 µF (minimum) capacitor to ground at each VDD pin when the internal VREG is used."
      },
      {
        "number": "44",
        "name": "GPIO19/XCLKIN/SPISTEA/LINRXA/ECAP1",
        "type": "bidirectional",
        "description": "GPIO19 (alternates: external oscillator clock input XCLKIN, SPI-A slave transmit enable, LIN receive input, eCAP1); can produce power-up glitch pulses when the internal VREG is used."
      },
      {
        "number": "45",
        "name": "GPIO38/TCK/XCLKIN",
        "type": "bidirectional",
        "description": "GPIO38 (alternates: JTAG test clock input with internal pull-up, external oscillator input XCLKIN); the TCK function must not conflict with an external clock during JTAG debug."
      },
      {
        "number": "46",
        "name": "GPIO37/TDO",
        "type": "tri_state",
        "description": "GPIO37 (alternate: JTAG test data output, 8 mA drive); it also participates in boot-mode selection."
      },
      {
        "number": "47",
        "name": "GPIO35/TDI",
        "type": "bidirectional",
        "description": "GPIO35 (alternate: JTAG test data input with internal pull-up)."
      },
      {
        "number": "48",
        "name": "GPIO36/TMS",
        "type": "bidirectional",
        "description": "GPIO36 (alternate: JTAG test mode select input with internal pull-up)."
      },
      {
        "number": "49",
        "name": "GPIO11/EPWM6B/LINRXA/HRCAP2",
        "type": "bidirectional",
        "description": "GPIO11 (alternates: ePWM6B output, LIN receive input, high-resolution capture input 2); inputs are not 5 V tolerant."
      },
      {
        "number": "50",
        "name": "GPIO5/EPWM3B/SPISIMOA/ECAP1",
        "type": "bidirectional",
        "description": "GPIO5 (alternates: ePWM3B output, SPI-A slave input/master output, eCAP1 I/O); inputs are not 5 V tolerant."
      },
      {
        "number": "51",
        "name": "GPIO4/EPWM3A",
        "type": "bidirectional",
        "description": "GPIO4 (alternate: ePWM3A output with HRPWM channel); inputs are not 5 V tolerant."
      },
      {
        "number": "52",
        "name": "GPIO10/EPWM6A/ADCSOCBO",
        "type": "bidirectional",
        "description": "GPIO10 (alternates: ePWM6A output with HRPWM channel, ADC SOC-B output); inputs are not 5 V tolerant."
      },
      {
        "number": "53",
        "name": "GPIO3/EPWM2B/SPISOMIA/COMP2OUT",
        "type": "bidirectional",
        "description": "GPIO3 (alternates: ePWM2B output, SPI-A slave output/master input, comparator 2 direct output); inputs are not 5 V tolerant."
      },
      {
        "number": "54",
        "name": "GPIO2/EPWM2A",
        "type": "bidirectional",
        "description": "GPIO2 (alternate: ePWM2A output with HRPWM channel); inputs are not 5 V tolerant."
      },
      {
        "number": "55",
        "name": "GPIO1/EPWM1B/COMP1OUT",
        "type": "bidirectional",
        "description": "GPIO1 (alternates: ePWM1B output, comparator 1 direct output); inputs are not 5 V tolerant."
      },
      {
        "number": "56",
        "name": "GPIO0/EPWM1A",
        "type": "bidirectional",
        "description": "GPIO0 (alternate: ePWM1A output with HRPWM channel); internal pull-up is disabled at reset for PWM pins."
      },
      {
        "number": "57",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer and flash supply, 2.97 V to 3.63 V, with a decoupling capacitor placed on this pin."
      },
      {
        "number": "58",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "59",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital supply; requires a 1.2 µF (minimum) capacitor to ground at each VDD pin when the internal VREG is used."
      },
      {
        "number": "60",
        "name": "VREGENZ",
        "type": "input",
        "description": "Internal regulator enable with internal pull-down: tie to VSS to enable the internal 1.8 V VREG, or to VDDIO to disable it and supply VDD externally."
      },
      {
        "number": "61",
        "name": "GPIO34/COMP2OUT/COMP3OUT",
        "type": "bidirectional",
        "description": "GPIO34 (alternates: comparator 2 direct output, comparator 3 direct output); inputs are not 5 V tolerant."
      },
      {
        "number": "62",
        "name": "GPIO20/EQEP1A/COMP1OUT",
        "type": "bidirectional",
        "description": "GPIO20 (alternates: EQEP1A input, comparator 1 direct output); inputs are not 5 V tolerant."
      },
      {
        "number": "63",
        "name": "GPIO21/EQEP1B/COMP2OUT",
        "type": "bidirectional",
        "description": "GPIO21 (alternates: EQEP1B input, comparator 2 direct output); inputs are not 5 V tolerant."
      },
      {
        "number": "64",
        "name": "GPIO24/ECAP1",
        "type": "bidirectional",
        "description": "GPIO24 (alternate: eCAP1 I/O); the SPI-B alternate is listed only for the PN and RSH packages and is not available on PAG."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 17 is a single pin carrying both VSSA and VREFLO (Table 5-1 notes VREFLO is tied to VSSA on the ; Pin 15 is shared between ADCINA0 and VREFHI; they cannot be used simultaneously (datasheet note B to; The PAG figure 5-2 text in the source is scrambled. The pin-to-name mapping was built from the PAG c"
        ],
        "pages_sent": 120,
        "cost_usd": 0.8466,
        "at": "2026-10-08T21:11:57"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tms320f28033",
        "pages": 176,
        "sha256": "cb9ccecfd6b5c484",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 64,
        "described": 64,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tms320f28032pagq.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          12.0,
          12.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "60567e81b0770b6c519104183a7a05ba52dddc11146b5fbe21434fbb5801696c",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tms320f28032pagq-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          12.0,
          12.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "41b4eb2458f084723498985c47483dd1fa8c9d243c0e0bfe6b64032760997604",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}