# TMS320F2802PZA

**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

TMS320F2802PZA from Texas Instruments, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GPIO12 | bidirectional | General-purpose I/O 12 (I/O/Z) with pullup enabled at reset; alternates are TZ1 trip-zone input, CANTXB (O, not available on 2801/2802) and SPISIMOB (I/O). |
| 2 | VSS | power_in | Digital ground pin. |
| 3 | VDDIO | power_in | Digital I/O power pin (3.3 V). |
| 4 | GPIO29 | bidirectional | General-purpose I/O 29 (I/O/Z) with 8-mA typical output buffer; alternates are SCITXDA (O) and TZ6 trip-zone input (I). |
| 5 | GPIO33 | bidirectional | General-purpose I/O 33 (I/O/Z) with pullup enabled at reset; alternates are SCLA I2C clock open-drain (I/OD), EPWMSYNCO (O) and ADCSOCBO (O). |
| 6 | GPIO30 | bidirectional | General-purpose I/O 30 (I/O/Z) with 8-mA typical output buffer; alternate is CANRXA enhanced CAN-A receive (I). |
| 7 | GPIO31 | bidirectional | General-purpose I/O 31 (I/O/Z) with 8-mA typical output buffer; alternate is CANTXA enhanced CAN-A transmit (O). |
| 8 | GPIO14 | bidirectional | General-purpose I/O 14 (I/O/Z) with pullup enabled at reset; alternates are TZ3 trip-zone input (I), SCITXDB (O, not available on 2801/2802) and SPICLKB (I/O). |
| 9 | GPIO15 | bidirectional | General-purpose I/O 15 (I/O/Z) with pullup enabled at reset; alternates are TZ4 trip-zone input (I), SCIRXDB (I, not available on 2801/2802) and SPISTEB (I/O). |
| 10 | VDD | power_in | CPU and logic digital power pin (1.8 V). |
| 11 | VSS | power_in | Digital ground pin. |
| 12 | VDD1A18 | power_in | ADC analog power pin (1.8 V). |
| 13 | VSS1AGND | power_in | ADC analog ground pin. |
| 14 | VSSA2 | power_in | ADC analog ground pin. |
| 15 | VDDA2 | power_in | ADC analog power pin (3.3 V). |
| 16 | ADCINA7 | input | ADC Group A, channel 7 analog input (0 to 3 V with respect to ADCLO). |
| 17 | ADCINA6 | input | ADC Group A, channel 6 analog input (0 to 3 V with respect to ADCLO). |
| 18 | ADCINA5 | input | ADC Group A, channel 5 analog input (0 to 3 V with respect to ADCLO). |
| 19 | ADCINA4 | input | ADC Group A, channel 4 analog input (0 to 3 V with respect to ADCLO). |
| 20 | ADCINA3 | input | ADC Group A, channel 3 analog input (0 to 3 V with respect to ADCLO). |
| 21 | ADCINA2 | input | ADC Group A, channel 2 analog input (0 to 3 V with respect to ADCLO). |
| 22 | ADCINA1 | input | ADC Group A, channel 1 analog input (0 to 3 V with respect to ADCLO). |
| 23 | ADCINA0 | input | ADC Group A, channel 0 analog input (0 to 3 V with respect to ADCLO). |
| 24 | ADCLO | input | ADC low reference, to be connected to analog ground. |
| 25 | VSSAIO | power_in | ADC analog I/O ground pin. |
| 26 | VDDAIO | power_in | ADC analog I/O power pin (3.3 V). |
| 27 | ADCINB0 | input | ADC Group B, channel 0 analog input (0 to 3 V with respect to ADCLO). |
| 28 | ADCINB1 | input | ADC Group B, channel 1 analog input (0 to 3 V with respect to ADCLO). |
| 29 | ADCINB2 | input | ADC Group B, channel 2 analog input (0 to 3 V with respect to ADCLO). |
| 30 | ADCINB3 | input | ADC Group B, channel 3 analog input (0 to 3 V with respect to ADCLO). |
| 31 | ADCINB4 | input | ADC Group B, channel 4 analog input (0 to 3 V with respect to ADCLO). |
| 32 | ADCINB5 | input | ADC Group B, channel 5 analog input (0 to 3 V with respect to ADCLO). |
| 33 | ADCINB6 | input | ADC Group B, channel 6 analog input (0 to 3 V with respect to ADCLO). |
| 34 | ADCINB7 | input | ADC Group B, channel 7 analog input (0 to 3 V with respect to ADCLO). |
| 35 | ADCREFIN | input | External ADC reference input; float or ground if the internal reference is used. |
| 36 | ADCREFM | output | Internal ADC reference medium output; requires a 2.2 uF ceramic bypass capacitor to analog ground with ESR under 1.5 ohm and should not be loaded externally. |
| 37 | ADCREFP | output | Internal ADC reference positive output; requires a 2.2 uF ceramic bypass capacitor to analog ground with ESR under 1.5 ohm and should not be loaded externally. |
| 38 | ADCRESEXT | passive | ADC external current bias resistor; connect a 22-kohm resistor to analog ground. |
| 39 | VSS2AGND | power_in | ADC analog ground pin. |
| 40 | VDD2A18 | power_in | ADC analog power pin (1.8 V). |
| 41 | VSS | power_in | Digital ground pin. |
| 42 | VDD | power_in | CPU and logic digital power pin (1.8 V). |
| 43 | GPIO34 | bidirectional | General-purpose I/O 34 (I/O/Z) with pullup enabled at reset and no peripheral alternate function listed for this pin. |
| 44 | GPIO1 | bidirectional | General-purpose I/O 1 (I/O/Z) with internal pullup selectable; alternates are EPWM1B (O) and SPISIMOD (I/O, not available on 2801/2802). |
| 45 | GPIO2 | bidirectional | General-purpose I/O 2 (I/O/Z) with internal pullup selectable; alternate is EPWM2A (O) and HRPWM channel. |
| 46 | VDDIO | power_in | Digital I/O power pin (3.3 V). |
| 47 | GPIO0 | bidirectional | General-purpose I/O 0 (I/O/Z), pullup not enabled at reset; alternate is EPWM1A (O) and HRPWM channel. |
| 48 | GPIO3 | bidirectional | General-purpose I/O 3 (I/O/Z) with internal pullup selectable; alternates are EPWM2B (O) and SPISOMID (I/O, not available on 2801/2802). |
| 49 | VSS | power_in | Digital ground pin. |
| 50 | GPIO16 | bidirectional | General-purpose I/O 16 (I/O/Z) with pullup enabled at reset; alternates are SPISIMOA (I/O), CANTXB (O, not available on 2801/2802/F2806) and TZ5 trip-zone input (I). |
| 51 | GPIO4 | bidirectional | General-purpose I/O 4 (I/O/Z) with internal pullup selectable; alternate is EPWM3A (O) and HRPWM channel. |
| 52 | GPIO17 | bidirectional | General-purpose I/O 17 (I/O/Z) with pullup enabled at reset; alternates are SPISOMIA (I/O), CANRXB (I, not available on 2801/2802/F2806) and TZ6 trip-zone input (I). |
| 53 | GPIO5 | bidirectional | General-purpose I/O 5 (I/O/Z) with internal pullup selectable; alternates are EPWM3B (O), SPICLKD (I/O, not available on 2801/2802) and ECAP1 (I/O). |
| 54 | GPIO18 | bidirectional | General-purpose I/O 18 (I/O/Z) with pullup enabled at reset; alternates are SPICLKA (I/O) and SCITXDB (O, not available on 2801/2802). |
| 55 | VSS | power_in | Digital ground pin. |
| 56 | GPIO6 | bidirectional | General-purpose I/O 6 (I/O/Z) with internal pullup selectable; alternates are EPWM4A (O, not available on 2801/2802), EPWMSYNCI (I) and EPWMSYNCO (O). |
| 57 | GPIO19 | bidirectional | General-purpose I/O 19 (I/O/Z) with pullup enabled at reset; alternates are SPISTEA (I/O) and SCIRXDB (I, not available on 2801/2802). |
| 58 | GPIO7 | bidirectional | General-purpose I/O 7 (I/O/Z) with internal pullup selectable; alternates are EPWM4B (O, not available on 2801/2802), SPISTED (I/O, not available on 2801/2802) and ECAP2 (I/O). |
| 59 | VDD | power_in | CPU and logic digital power pin (1.8 V). |
| 60 | GPIO8 | bidirectional | General-purpose I/O 8 (I/O/Z) with internal pullup selectable; alternates are EPWM5A (O, not available on 2801/2802), CANTXB (O, not available on 2801/2802/F2806) and ADCSOCAO (O). |
| 61 | GPIO9 | bidirectional | General-purpose I/O 9 (I/O/Z) with internal pullup selectable; alternates are EPWM5B (O, not available on 2801/2802), SCITXDB (O, not available on 2801/2802) and ECAP3 (I/O, not available on 2801/2802). |
| 62 | VSS | power_in | Digital ground pin. |
| 63 | GPIO20 | bidirectional | General-purpose I/O 20 (I/O/Z) with pullup enabled at reset; alternates are EQEP1A (I), SPISIMOC (I/O, not available on 2801/2802) and CANTXB (O, not available on 2801/2802/F2806). |
| 64 | GPIO10 | bidirectional | General-purpose I/O 10 (I/O/Z) with internal pullup selectable; alternates are EPWM6A (O, not available on 2801/2802), CANRXB (I, not available on 2801/2802/F2806) and ADCSOCBO (O). |
| 65 | VDDIO | power_in | Digital I/O power pin (3.3 V). |
| 66 | XCLKOUT | output | Output clock derived from SYSCLKOUT at the same, half or quarter frequency (XCLKOUTDIV); reset value is SYSCLKOUT/4 and it is not placed in high impedance during reset (O/Z, 8 mA drive). |
| 67 | GPIO21 | bidirectional | General-purpose I/O 21 (I/O/Z) with pullup enabled at reset; alternates are EQEP1B (I), SPISOMIC (I/O, not available on 2801/2802) and CANRXB (I, not available on 2801/2802/F2806). |
| 68 | VDD | power_in | CPU and logic digital power pin (1.8 V). |
| 69 | VSS | power_in | Digital ground pin. |
| 70 | GPIO11 | bidirectional | General-purpose I/O 11 (I/O/Z) with internal pullup selectable; alternates are EPWM6B (O, not available on 2801/2802), SCIRXDB (I, not available on 2801/2802) and ECAP4 (I/O, not available on 2801/2802). |
| 71 | GPIO22 | bidirectional | General-purpose I/O 22 (I/O/Z) with pullup enabled at reset; alternates are EQEP1S (I/O), SPICLKC (I/O, not available on 2801/2802) and SCITXDB (O, not available on 2801/2802). |
| 72 | GPIO23 | bidirectional | General-purpose I/O 23 (I/O/Z) with pullup enabled at reset; alternates are EQEP1I (I/O), SPISTEC (I/O, not available on 2801/2802) and SCIRXDB (I, not available on 2801/2802). |
| 73 | TDI | input | JTAG test data input with internal pullup, clocked into the selected register on the rising edge of TCK (I, pullup). |
| 74 | TMS | input | JTAG test-mode select with internal pullup, clocked into the TAP controller on the rising edge of TCK (I, pullup). |
| 75 | TCK | input | JTAG test clock with internal pullup (I, pullup). |
| 76 | TDO | tri_state | JTAG scan out and test data output, shifted out on the falling edge of TCK (O/Z, 8 mA drive). |
| 77 | VSS | power_in | Digital ground pin. |
| 78 | XRS | bidirectional | Device reset input and watchdog reset output; open-drain with internal pullup, driven low for 512 OSCCLK cycles during watchdog reset (I/OD, pullup). |
| 79 | GPIO27 | bidirectional | General-purpose I/O 27 (I/O/Z) with pullup enabled at reset; alternates are ECAP4 (I/O, not available on 2801/2802), EQEP2S (I/O, not available on 2801/2802) and SPISTEB (I/O). |
| 80 | EMU0 | bidirectional | Emulator pin 0 (I/O/Z, 8 mA drive, pullup); external pullup of 2.2 kohm to 4.7 kohm is recommended and it is used with EMU1 to latch boundary-scan mode on TRST rising edge. |
| 81 | EMU1 | bidirectional | Emulator pin 1 (I/O/Z, 8 mA drive, pullup); external pullup of 2.2 kohm to 4.7 kohm is recommended and it is used with EMU0 to latch boundary-scan mode on TRST rising edge. |
| 82 | VDDIO | power_in | Digital I/O power pin (3.3 V). |
| 83 | GPIO24 | bidirectional | General-purpose I/O 24 (I/O/Z) with pullup enabled at reset; alternates are ECAP1 (I/O), EQEP2A (I, not available on 2801/2802) and SPISIMOB (I/O). |
| 84 | TRST | input | JTAG test reset with internal pulldown; must be kept low during normal operation and an external 2.2 kohm pulldown is generally adequate. |
| 85 | VDD | power_in | CPU and logic digital power pin (1.8 V). |
| 86 | X2 | output | Internal oscillator output for a quartz crystal or ceramic resonator across X1 and X2; leave unconnected if not used (O). |
| 87 | VSS | power_in | Digital ground pin. |
| 88 | X1 | input | Internal oscillator input referenced to the 1.8-V core supply; a 1.8-V external oscillator may drive it with XCLKIN tied to ground, and with a 3.3-V oscillator on XCLKIN, X1 must be tied to GND (I). |
| 89 | VSS | power_in | Digital ground pin. |
| 90 | XCLKIN | input | External oscillator input fed from an external 3.3-V oscillator, in which case X1 is tied to GND (I). |
| 91 | GPIO25 | bidirectional | General-purpose I/O 25 (I/O/Z) with pullup enabled at reset; alternates are ECAP2 (I/O), EQEP2B (I, not available on 2801/2802) and SPISOMIB (I/O). |
| 92 | GPIO28 | bidirectional | General-purpose I/O 28 (I/O/Z) with pullup enabled at reset and 8-mA typical output buffer; alternates are SCIRXDA (I) and TZ5 trip-zone input (I). |
| 93 | VDD | power_in | CPU and logic digital power pin (1.8 V). |
| 94 | VSS | power_in | Digital ground pin. |
| 95 | GPIO13 | bidirectional | General-purpose I/O 13 (I/O/Z) with pullup enabled at reset; alternates are TZ2 trip-zone input (I), CANRXB (I, not available on 2801/2802/F2806) and SPISOMIB (I/O). |
| 96 | VDD3VFL | power_in | 3.3-V flash core power pin that should be connected to 3.3 V at all times. |
| 97 | TEST1 | unconnected | Test pin reserved for TI that must be left unconnected. |
| 98 | TEST2 | unconnected | Test pin reserved for TI that must be left unconnected. |
| 99 | GPIO26 | bidirectional | General-purpose I/O 26 (I/O/Z) with pullup enabled at reset; alternates are ECAP3 (I/O, not available on 2801/2802), EQEP2I (I/O, not available on 2801/2802) and SPICLKB (I/O). |
| 100 | GPIO32 | bidirectional | General-purpose I/O 32 (I/O/Z) with pullup enabled at reset; alternates are SDAA I2C data open-drain (I/OD), EPWMSYNCI (I) and ADCSOCAO (O). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |

## CAD (KiCad official)

- Symbol: `TMS320F2802PZA`
- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`
- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files: `tms320f2802pza-etched.step` / `tms320f2802pza-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tms320f2802pza.step` / `tms320f2802pza.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tms320f2802-q1) (157 pp, sha256 `a13113c4c002c567`, retrieved 2026-10-11, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tms320f2802pza-datasheet.pdf)