TMS320F28027PTR

{
  "schema_version": 1,
  "type": "component",
  "slug": "tms320f28027ptr",
  "title": "TMS320F28027PTR",
  "brief": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "embedded processors & controllers",
    "tms320f28027ptr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "TMS320F28027PTR",
    "manufacturer": "Texas Instruments",
    "package": "LQFP-48(7x7)",
    "pin_count": 48,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tms320f28020",
    "parts": {
      "symbol": "tms320f28027ptr.kicad_sym",
      "footprint": "tms320f28027ptr.kicad_mod",
      "model_3d": "tms320f28027ptr-hero.glb",
      "model_3d_plain": "tms320f28027ptr.glb",
      "model_3d_step": "tms320f28027ptr-etched.step",
      "model_3d_step_plain": "tms320f28027ptr.step",
      "lbr": "tms320f28027ptr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2053786",
      "digikey": "296-43615-2-ND",
      "mouser": "595-TMS320F28027PTR"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T19:00:41Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-43615-2-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-TMS320F28027PTR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "GPIO29/SCITXDA/SCLA/TZ3",
        "type": "bidirectional",
        "description": "General-purpose I/O 29 (Group 2, 8 mA) with SCI-A transmit, I2C-A clock (open-drain) and trip-zone 3 alternate functions; inputs are not 5 V tolerant."
      },
      {
        "number": "2",
        "name": "TRST",
        "type": "input",
        "description": "JTAG test reset with internal pull-down; must be held low during normal operation, needs an external pull-up (about 2.2 kΩ typical) and leaving it low runs the device in functional mode."
      },
      {
        "number": "3",
        "name": "XRS",
        "type": "bidirectional",
        "description": "Open-drain device reset input and watchdog reset output with internal pull-up; a 2.2 kΩ to 10 kΩ resistor to VDDIO is required and any noise-filter capacitor to VSS must be 100 nF or less."
      },
      {
        "number": "4",
        "name": "ADCINA6/AIO6",
        "type": "input",
        "description": "ADC group A channel 6 analog input, also usable as digital AIO6; AIO pins have no internal pull-up."
      },
      {
        "number": "5",
        "name": "ADCINA4/COMP2A/AIO4",
        "type": "input",
        "description": "ADC group A channel 4 analog input, also comparator 2A input (48-pin device only) and AIO4."
      },
      {
        "number": "6",
        "name": "ADCINA7",
        "type": "input",
        "description": "ADC group A channel 7 analog input, with full-scale range of 0 V to 3.3 V (or VREFHI/VREFLO ratiometric)."
      },
      {
        "number": "7",
        "name": "ADCINA3",
        "type": "input",
        "description": "ADC group A channel 3 analog input, with full-scale range of 0 V to 3.3 V (or VREFHI/VREFLO ratiometric)."
      },
      {
        "number": "8",
        "name": "ADCINA1",
        "type": "input",
        "description": "ADC group A channel 1 analog input, with full-scale range of 0 V to 3.3 V (or VREFHI/VREFLO ratiometric)."
      },
      {
        "number": "9",
        "name": "ADCINA2/COMP1A/AIO2",
        "type": "input",
        "description": "ADC group A channel 2 analog input, also comparator 1A input and AIO2."
      },
      {
        "number": "10",
        "name": "ADCINA0/VREFHI",
        "type": "input",
        "description": "ADC group A channel 0 analog input; doubles as external ADC high reference VREFHI, used only in external reference mode and not to exceed VDDA."
      },
      {
        "number": "11",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog supply, 2.97 V to 3.63 V (3.3 V nominal); place about 2.2 µF capacitor close to this pin."
      },
      {
        "number": "12",
        "name": "VSSA/VREFLO",
        "type": "power_in",
        "description": "Analog ground, also the ADC external reference low VREFLO which is always tied to ground."
      },
      {
        "number": "13",
        "name": "ADCINB1",
        "type": "input",
        "description": "ADC group B channel 1 analog input, with full-scale range of 0 V to 3.3 V (or VREFHI/VREFLO ratiometric)."
      },
      {
        "number": "14",
        "name": "ADCINB2/COMP1B/AIO10",
        "type": "input",
        "description": "ADC group B channel 2 analog input, also comparator 1B input and AIO10."
      },
      {
        "number": "15",
        "name": "ADCINB3",
        "type": "input",
        "description": "ADC group B channel 3 analog input, with full-scale range of 0 V to 3.3 V (or VREFHI/VREFLO ratiometric)."
      },
      {
        "number": "16",
        "name": "ADCINB4/COMP2B/AIO12",
        "type": "input",
        "description": "ADC group B channel 4 analog input, also comparator 2B input (48-pin device only) and AIO12."
      },
      {
        "number": "17",
        "name": "ADCINB6/AIO14",
        "type": "input",
        "description": "ADC group B channel 6 analog input, also usable as digital AIO14."
      },
      {
        "number": "18",
        "name": "ADCINB7",
        "type": "input",
        "description": "ADC group B channel 7 analog input, with full-scale range of 0 V to 3.3 V (or VREFHI/VREFLO ratiometric)."
      },
      {
        "number": "19",
        "name": "GPIO34/COMP2OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O 34 with comparator 2 direct output (48-pin only) and boot-mode select function; may glitch at power-up when the on-chip VREG is used."
      },
      {
        "number": "20",
        "name": "GPIO35/TDI",
        "type": "bidirectional",
        "description": "General-purpose I/O 35 with JTAG test data input (TDI) on the rising edge of TCK and an internal pull-up; may glitch at power-up when the on-chip VREG is used."
      },
      {
        "number": "21",
        "name": "GPIO36/TMS",
        "type": "bidirectional",
        "description": "General-purpose I/O 36 with JTAG test mode select (TMS) input to the TAP controller on TCK rising edge and an internal pull-up; Group 2 pin (8 mA)."
      },
      {
        "number": "22",
        "name": "GPIO37/TDO",
        "type": "bidirectional",
        "description": "General-purpose I/O 37 with JTAG test data output (TDO, 8 mA drive); also used for boot-mode selection, which is unavailable when a JTAG debug probe is connected."
      },
      {
        "number": "23",
        "name": "GPIO38/XCLKIN/TCK",
        "type": "bidirectional",
        "description": "General-purpose I/O 38 with JTAG test clock (TCK, internal pull-up) and external oscillator input XCLKIN (default clock source); using it as external clock may conflict with JTAG debug."
      },
      {
        "number": "24",
        "name": "GPIO18/SPICLKA/SCITXDA/XCLKOUT",
        "type": "bidirectional",
        "description": "General-purpose I/O 18 (Group 2, 8 mA) with SPI-A clock, SCI-A transmit and XCLKOUT output; XCLKOUT resets to SYSCLKOUT/4."
      },
      {
        "number": "25",
        "name": "GPIO19/XCLKIN/SPISTEA/SCIRXDA/ECAP1",
        "type": "bidirectional",
        "description": "General-purpose I/O 19 (Group 2, 8 mA) with external oscillator input XCLKIN, SPI-A slave transmit enable, SCI-A receive and eCAP1; may glitch at power-up when the on-chip VREG is used."
      },
      {
        "number": "26",
        "name": "GPIO17/SPISOMIA/TZ3",
        "type": "bidirectional",
        "description": "General-purpose I/O 17 (Group 2, 8 mA) with SPI-A slave output / master input and trip-zone 3; may glitch at power-up when the on-chip VREG is used."
      },
      {
        "number": "27",
        "name": "GPIO16/SPISIMOA/TZ2",
        "type": "bidirectional",
        "description": "General-purpose I/O 16 (Group 2, 8 mA) with SPI-A slave input / master output and trip-zone 2."
      },
      {
        "number": "28",
        "name": "GPIO1/EPWM1B/COMP1OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O 1 with ePWM1 output B and comparator 1 direct output."
      },
      {
        "number": "29",
        "name": "GPIO0/EPWM1A",
        "type": "bidirectional",
        "description": "General-purpose I/O 0 with ePWM1 output A and HRPWM channel; GPIO0 can also feed XINT inputs."
      },
      {
        "number": "30",
        "name": "TEST",
        "type": "unconnected",
        "description": "Reserved for TI; must be kept unconnected."
      },
      {
        "number": "31",
        "name": "GPIO32/SDAA/EPWMSYNCI/ADCSOCAO",
        "type": "bidirectional",
        "description": "General-purpose I/O 32 with I2C-A data (open-drain), external ePWM sync input and ADC start-of-conversion A output."
      },
      {
        "number": "32",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital supply; when the internal VREG is enabled a 1.2 µF (minimum) capacitor to ground is required on each VDD pin, and with VREG disabled it is supplied 1.71 V to 1.995 V (1.8 V nominal)."
      },
      {
        "number": "33",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "34",
        "name": "VREGENZ",
        "type": "input",
        "description": "Internal regulator enable with internal pull-down; tie to VSS to enable the internal 1.8 V VREG, or tie to VDDIO to disable it and supply VDD externally."
      },
      {
        "number": "35",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O and Flash supply, 2.97 V to 3.63 V (3.3 V nominal) with decoupling capacitor on this pin; single supply when VREG is enabled."
      },
      {
        "number": "36",
        "name": "GPIO33/SCLA/EPWMSYNCO/ADCSOCBO",
        "type": "bidirectional",
        "description": "General-purpose I/O 33 with I2C-A clock (open-drain), external ePWM sync output and ADC start-of-conversion B output."
      },
      {
        "number": "37",
        "name": "GPIO2/EPWM2A",
        "type": "bidirectional",
        "description": "General-purpose I/O 2 with ePWM2 output A and HRPWM channel."
      },
      {
        "number": "38",
        "name": "GPIO3/EPWM2B/COMP2OUT",
        "type": "bidirectional",
        "description": "General-purpose I/O 3 with ePWM2 output B and comparator 2 direct output (48-pin only)."
      },
      {
        "number": "39",
        "name": "GPIO4/EPWM3A",
        "type": "bidirectional",
        "description": "General-purpose I/O 4 with ePWM3 output A and HRPWM channel."
      },
      {
        "number": "40",
        "name": "GPIO5/EPWM3B/ECAP1",
        "type": "bidirectional",
        "description": "General-purpose I/O 5 with ePWM3 output B and enhanced capture input/output 1 (eCAP1)."
      },
      {
        "number": "41",
        "name": "GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO",
        "type": "bidirectional",
        "description": "General-purpose I/O 6 with ePWM4 output A and HRPWM channel, plus external ePWM sync input and sync output."
      },
      {
        "number": "42",
        "name": "GPIO7/EPWM4B/SCIRXDA",
        "type": "bidirectional",
        "description": "General-purpose I/O 7 with ePWM4 output B and SCI-A receive data input."
      },
      {
        "number": "43",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital supply; when the internal VREG is enabled a 1.2 µF (minimum) capacitor to ground is required on each VDD pin."
      },
      {
        "number": "44",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "45",
        "name": "X1",
        "type": "input",
        "description": "1.8 V on-chip crystal oscillator input that must not be driven with 3.3 V signals; connect to GND if the oscillator is unused and use with X2 and a crystal or resonator when used."
      },
      {
        "number": "46",
        "name": "X2",
        "type": "output",
        "description": "On-chip crystal oscillator output; connect to X1 with a crystal or resonator, and leave unconnected if not used."
      },
      {
        "number": "47",
        "name": "GPIO12/TZ1/SCITXDA",
        "type": "bidirectional",
        "description": "General-purpose I/O 12 with trip-zone 1 input and SCI-A transmit data output."
      },
      {
        "number": "48",
        "name": "GPIO28/SCIRXDA/SDAA/TZ2",
        "type": "bidirectional",
        "description": "General-purpose I/O 28 with SCI receive data input, I2C-A data (open-drain) and trip-zone 2 input."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin-figure text on page 8 is scrambled for pins 34-36. The signal table on page 12 is explicit: VREG; Pin 30 (TEST) is listed as I/O in the signal table, but the datasheet says it is reserved for TI and; Pin 12 is shared between VSSA and VREFLO. The table types VREFLO as an input but it is always tied t"
        ],
        "pages_sent": 85,
        "cost_usd": 0.609,
        "at": "2026-10-11T19:00:15"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tms320f28020",
        "pages": 147,
        "sha256": "b90c388f4142c4b5",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tms320f28027ptr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          1.5
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tms320f28027ptr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          1.5
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "63c7f3cc8a5b9033ffa54f5ddd2540cad367aaf6f8f64f279754347f938a9e28",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "LQFP-48(7x7)",
      "Category": "Embedded Processors & Controllers",
      "Pins": "48"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "tms320f28027ptr"
  ],
  "discovery_pitch": "TMS320F28027PTR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
    "tms320f28027ptr.kicad_sym",
    "tms320f28027ptr.kicad_mod",
    "tms320f28027ptr.glb",
    "tms320f28027ptr.step",
    "tms320f28027ptr.lbr",
    "docs/hero.png",
    "docs/tms320f28027ptr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tms320f28027ptr-hero.glb",
    "tms320f28027ptr-hero.overlay.json"
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  "visibility": {
    "public": true
  }
}