component
TMS320F28023PTQ
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "tms320f28023ptq",
"title": "TMS320F28023PTQ",
"brief": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"embedded processors & controllers",
"tms320f28023ptq",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "TMS320F28023PTQ",
"manufacturer": "Texas Instruments",
"package": "LQFP-48(7x7)",
"pin_count": 48,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://www.ti.com/cn/lit/gpn/tms320f28020",
"parts": {
"symbol": "tms320f28023ptq.kicad_sym",
"footprint": "tms320f28023ptq.kicad_mod",
"model_3d": "tms320f28023ptq-hero.glb",
"model_3d_plain": "tms320f28023ptq.glb",
"model_3d_step": "tms320f28023ptq-etched.step",
"model_3d_step_plain": "tms320f28023ptq.step",
"lbr": "tms320f28023ptq.lbr"
},
"distributor_links": {
"lcsc": "C504363",
"digikey": "TMS320F28023PTQ-ND",
"mouser": "595-TMS320F28023PTQ"
},
"distributor_check": {
"checked_at": "2026-10-08T21:35:54Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "TMS320F28023PTQ-ND",
"status": "found"
},
"mouser": {
"pn": "595-TMS320F28023PTQ",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "GPIO29/SCITXDA/SCLA/TZ3",
"type": "bidirectional",
"description": "General-purpose I/O 29 with alternate functions SCI-A transmit, I2C-A clock (open-drain) and trip-zone input 3; inputs are not 5 V tolerant and the internal pull-up is enabled after reset."
},
{
"number": "2",
"name": "TRST",
"type": "input",
"description": "JTAG test reset with internal pull-down that must be held low during normal operation and needs an external pull-up (about 2.2 kΩ typical, depending on debugger pod drive strength)."
},
{
"number": "3",
"name": "XRS",
"type": "bidirectional",
"description": "Open-drain device reset input and watchdog reset output with internal pull-up, driven low during power-up/brown-out and for 512 OSCCLK cycles on a watchdog reset; a 2.2 kΩ to 10 kΩ resistor to VDDIO is required."
},
{
"number": "4",
"name": "ADCINA6/AIO6",
"type": "bidirectional",
"description": "ADC group A channel 6 analog input, or digital AIO6 I/O when AIO function is selected; AIO pins have no internal pull-up."
},
{
"number": "5",
"name": "ADCINA4/COMP2A/AIO4",
"type": "bidirectional",
"description": "ADC group A channel 4 analog input, comparator 2A input (48-pin package only), or digital AIO4 I/O."
},
{
"number": "6",
"name": "ADCINA7",
"type": "input",
"description": "ADC group A channel 7 analog input."
},
{
"number": "7",
"name": "ADCINA3",
"type": "input",
"description": "ADC group A channel 3 analog input."
},
{
"number": "8",
"name": "ADCINA1",
"type": "input",
"description": "ADC group A channel 1 analog input."
},
{
"number": "9",
"name": "ADCINA2/COMP1A/AIO2",
"type": "bidirectional",
"description": "ADC group A channel 2 analog input, comparator 1A input, or digital AIO2 I/O."
},
{
"number": "10",
"name": "ADCINA0/VREFHI",
"type": "input",
"description": "ADC group A channel 0 analog input; VREFHI is the external ADC reference high used only in external reference mode and must not exceed VDDA."
},
{
"number": "11",
"name": "VDDA",
"type": "power_in",
"description": "Analog supply, 2.97 V to 3.63 V (3.3 V nominal); place a 2.2 µF capacitor (typical) near this pin."
},
{
"number": "12",
"name": "VSSA/VREFLO",
"type": "power_in",
"description": "Analog ground, also the ADC external reference low (VREFLO), which is always grounded."
},
{
"number": "13",
"name": "ADCINB1",
"type": "input",
"description": "ADC group B channel 1 analog input."
},
{
"number": "14",
"name": "ADCINB2/COMP1B/AIO10",
"type": "bidirectional",
"description": "ADC group B channel 2 analog input, comparator 1B input, or digital AIO10 I/O."
},
{
"number": "15",
"name": "ADCINB3",
"type": "input",
"description": "ADC group B channel 3 analog input."
},
{
"number": "16",
"name": "ADCINB4/COMP2B/AIO12",
"type": "bidirectional",
"description": "ADC group B channel 4 analog input, comparator 2B input (48-pin package only), or digital AIO12 I/O."
},
{
"number": "17",
"name": "ADCINB6/AIO14",
"type": "bidirectional",
"description": "ADC group B channel 6 analog input or digital AIO14 I/O; AIO pins have no internal pull-up."
},
{
"number": "18",
"name": "ADCINB7",
"type": "input",
"description": "ADC group B channel 7 analog input."
},
{
"number": "19",
"name": "GPIO34/COMP2OUT",
"type": "bidirectional",
"description": "General-purpose I/O 34 or comparator 2 direct output (COMP2OUT, 48-pin only); may glitch during power-up when the internal VREG is used."
},
{
"number": "20",
"name": "GPIO35/TDI",
"type": "bidirectional",
"description": "General-purpose I/O 35 or JTAG test data input (TDI) with internal pull-up, sampled on the rising edge of TCK; may glitch during power-up when the internal VREG is used."
},
{
"number": "21",
"name": "GPIO36/TMS",
"type": "bidirectional",
"description": "General-purpose I/O 36 or JTAG test mode select (TMS) with internal pull-up, sampled on the rising edge of TCK; may glitch during power-up when the internal VREG is used."
},
{
"number": "22",
"name": "GPIO37/TDO",
"type": "tri_state",
"description": "General-purpose I/O 37 or JTAG test data output (TDO), 8 mA drive, shifted out on the falling edge of TCK; may glitch during power-up when the internal VREG is used."
},
{
"number": "23",
"name": "GPIO38/TCK/XCLKIN",
"type": "bidirectional",
"description": "General-purpose I/O 38, JTAG test clock (TCK) with internal pull-up, or external oscillator input XCLKIN (default clock-source selection)."
},
{
"number": "24",
"name": "GPIO18/SPICLKA/SCITXDA/XCLKOUT",
"type": "bidirectional",
"description": "General-purpose I/O 18, SPI-A clock, SCI-A transmit, or XCLKOUT (SYSCLKOUT-derived, reset to SYSCLKOUT/4); a group 2 pin limited to 4 mA source/sink (8 mA group 2 option per the datasheet table)."
},
{
"number": "25",
"name": "GPIO19/XCLKIN/SPISTEA/SCIRXDA/ECAP1",
"type": "bidirectional",
"description": "General-purpose I/O 19, external oscillator input XCLKIN, SPI-A slave transmit enable, SCI-A receive or eCAP1 I/O; may glitch during power-up when the internal VREG is used."
},
{
"number": "26",
"name": "GPIO17/SPISOMIA/TZ3",
"type": "bidirectional",
"description": "General-purpose I/O 17, SPI-A slave output (master input), or trip-zone input 3."
},
{
"number": "27",
"name": "GPIO16/SPISIMOA/TZ2",
"type": "bidirectional",
"description": "General-purpose I/O 16, SPI-A slave input (master output), or trip-zone input 2."
},
{
"number": "28",
"name": "GPIO1/EPWM1B/COMP1OUT",
"type": "bidirectional",
"description": "General-purpose I/O 1, ePWM1B output, or comparator 1 direct output (COMP1OUT)."
},
{
"number": "29",
"name": "GPIO0/EPWM1A",
"type": "bidirectional",
"description": "General-purpose I/O 0 or ePWM1A output (with HRPWM channel); PWM pins have no pull-up enabled at reset."
},
{
"number": "30",
"name": "TEST",
"type": "bidirectional",
"description": "Reserved for TI test; must be left unconnected."
},
{
"number": "31",
"name": "GPIO32/SDAA/EPWMSYNCI/ADCSOCAO",
"type": "bidirectional",
"description": "General-purpose I/O 32, I2C-A data (open-drain), ePWM external sync input, or ADC start-of-conversion A output."
},
{
"number": "32",
"name": "VDD",
"type": "power_in",
"description": "CPU and logic digital supply; when the internal VREG is used a 1.2 µF (minimum) capacitor is required on each VDD pin, and when VREG is disabled it must be supplied at 1.71 V to 1.995 V (1.8 V nominal)."
},
{
"number": "33",
"name": "VSS",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "34",
"name": "VREGENZ",
"type": "input",
"description": "Internal regulator enable with internal pull-down: tie to VSS to enable the internal 1.8 V VREG, or to VDDIO to disable it and use an external 1.8 V supply."
},
{
"number": "35",
"name": "VDDIO",
"type": "power_in",
"description": "Digital I/O buffer and flash supply, 2.97 V to 3.63 V (3.3 V nominal); a decoupling capacitor is required on this pin."
},
{
"number": "36",
"name": "GPIO33/SCLA/EPWMSYNCO/ADCSOCBO",
"type": "bidirectional",
"description": "General-purpose I/O 33, I2C-A clock (open-drain), ePWM external sync output, or ADC start-of-conversion B output."
},
{
"number": "37",
"name": "GPIO2/EPWM2A",
"type": "bidirectional",
"description": "General-purpose I/O 2 or ePWM2A output (with HRPWM channel)."
},
{
"number": "38",
"name": "GPIO3/EPWM2B/COMP2OUT",
"type": "bidirectional",
"description": "General-purpose I/O 3, ePWM2B output, or comparator 2 direct output (COMP2OUT, 48-pin only)."
},
{
"number": "39",
"name": "GPIO4/EPWM3A",
"type": "bidirectional",
"description": "General-purpose I/O 4 or ePWM3A output (with HRPWM channel)."
},
{
"number": "40",
"name": "GPIO5/EPWM3B/ECAP1",
"type": "bidirectional",
"description": "General-purpose I/O 5, ePWM3B output, or eCAP1 input/output."
},
{
"number": "41",
"name": "GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO",
"type": "bidirectional",
"description": "General-purpose I/O 6, ePWM4A output (with HRPWM channel), or external ePWM sync input/output."
},
{
"number": "42",
"name": "GPIO7/EPWM4B/SCIRXDA",
"type": "bidirectional",
"description": "General-purpose I/O 7, ePWM4B output, or SCI-A receive data."
},
{
"number": "43",
"name": "VDD",
"type": "power_in",
"description": "CPU and logic digital supply; same requirements as pin 32 (1.2 µF per VDD pin with internal VREG, 1.71 V to 1.995 V if VREG is disabled)."
},
{
"number": "44",
"name": "VSS",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "45",
"name": "X1",
"type": "input",
"description": "1.8 V on-chip crystal oscillator input that must never receive 3.3 V signals; connect to GND if unused, and it is used together with X2 and a crystal or resonator."
},
{
"number": "46",
"name": "X2",
"type": "output",
"description": "On-chip crystal oscillator output that must be connected to X2's crystal/resonator with X1; leave unconnected if unused."
},
{
"number": "47",
"name": "GPIO12/TZ1/SCITXDA",
"type": "bidirectional",
"description": "General-purpose I/O 12, trip-zone input 1, or SCI-A transmit data."
},
{
"number": "48",
"name": "GPIO28/SCIRXDA/SDAA/TZ2",
"type": "bidirectional",
"description": "General-purpose I/O 28, SCI receive data, I2C-A data (open-drain), or trip-zone input 2; a group 2 pin with reduced drive strength."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin-number conflict for VREGENZ, VDDIO and GPIO33 (PT pins 34-36). The signal-description table (p.1; Pin 47 and 24 descriptions: the figure label for GPIO12 is garbled in the source text; the function ; Source is the Chinese translation (ZHCSA13P) of the TI datasheet; the English original (SPRS523) was",
"1/48 pins cited to the wrong page (name found elsewhere): ['18:ADCINB7@p14']"
],
"pages_sent": 85,
"cost_usd": 0.616,
"at": "2026-10-08T21:35:16"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/tms320f28020",
"pages": 147,
"sha256": "b90c388f4142c4b5",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 48,
"described": 48,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "tms320f28023ptq.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
1.5
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "tms320f28023ptq-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
1.5
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "a62724e288aee933395359a15257804d4dd609489e08735a8e1b90b643a00cd2",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "LQFP-48(7x7)",
"Category": "Embedded Processors & Controllers",
"Pins": "48"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"tms320f28023ptq"
],
"discovery_pitch": "TMS320F28023PTQ (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"tms320f28023ptq.kicad_sym",
"tms320f28023ptq.kicad_mod",
"tms320f28023ptq.glb",
"tms320f28023ptq.step",
"tms320f28023ptq.lbr",
"docs/hero.png",
"docs/tms320f28023ptq-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"tms320f28023ptq-hero.glb",
"tms320f28023ptq-hero.overlay.json"
],
"visibility": {
"public": true
}
}