TMS320C54CSTPGE

{
  "slug": "tms320c54cstpge",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "tms320c54cstpge",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
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  "files": [
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  "component": {
    "mpn": "TMS320C54CSTPGE",
    "manufacturer": "Texas Instruments",
    "package": "LQFP-144(20x20)",
    "pin_count": 144,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tms320c54cst",
    "parts": {
      "symbol": "tms320c54cstpge.kicad_sym",
      "footprint": "tms320c54cstpge.kicad_mod",
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      "model_3d_plain": "tms320c54cstpge.glb",
      "model_3d_step": "tms320c54cstpge-etched.step",
      "model_3d_step_plain": "tms320c54cstpge.step",
      "lbr": "tms320c54cstpge.lbr"
    },
    "distributor_links": {
      "lcsc": "C701434",
      "digikey": "2156-TMS320C54CSTPGE-ND",
      "mouser": "595-TMS320C54CSTPGE"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T23:16:56Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "2156-TMS320C54CSTPGE-ND",
        "status": "found",
        "lifecycle": "Obsolete"
      },
      "mouser": {
        "pn": "595-TMS320C54CSTPGE",
        "status": "found",
        "lifecycle": "Obsolete"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "2",
        "name": "A22",
        "type": "tri_state",
        "description": "Address bus MSB (A22); upper address pins A22-A16 address external program space only and go high-impedance in hold mode or when OFF is low."
      },
      {
        "number": "3",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "4",
        "name": "DVDD",
        "type": "power_in",
        "description": "3.3-V supply for the I/O pins."
      },
      {
        "number": "5",
        "name": "A10",
        "type": "tri_state",
        "description": "Parallel address bus bit A10; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "6",
        "name": "HD7",
        "type": "bidirectional",
        "description": "HPI data bus bit 7, also usable as general-purpose I/O."
      },
      {
        "number": "7",
        "name": "A11",
        "type": "tri_state",
        "description": "Parallel address bus bit A11; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "8",
        "name": "A12",
        "type": "tri_state",
        "description": "Parallel address bus bit A12; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "9",
        "name": "A13",
        "type": "tri_state",
        "description": "Parallel address bus bit A13; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "10",
        "name": "A14",
        "type": "tri_state",
        "description": "Parallel address bus bit A14; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "11",
        "name": "A15",
        "type": "tri_state",
        "description": "Parallel address bus bit A15 (MSB of lower address); high-impedance in hold mode or when OFF is low; HPI address MSB input when HPI16 is high."
      },
      {
        "number": "12",
        "name": "CVDD",
        "type": "power_in",
        "description": "1.5-V supply for the core CPU."
      },
      {
        "number": "13",
        "name": "HAS",
        "type": "input",
        "description": "Host-port interface address strobe input."
      },
      {
        "number": "14",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "15",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "16",
        "name": "CVDD",
        "type": "power_in",
        "description": "1.5-V supply for the core CPU."
      },
      {
        "number": "17",
        "name": "HCS",
        "type": "input",
        "description": "Host-port interface chip select input."
      },
      {
        "number": "18",
        "name": "HR/W",
        "type": "input",
        "description": "Host-port interface read/write input."
      },
      {
        "number": "19",
        "name": "READY",
        "type": "input",
        "description": "External device ready input used to insert wait states."
      },
      {
        "number": "20",
        "name": "PS",
        "type": "tri_state",
        "description": "Program space select strobe output."
      },
      {
        "number": "21",
        "name": "DS",
        "type": "tri_state",
        "description": "Data space select strobe output."
      },
      {
        "number": "22",
        "name": "IS",
        "type": "tri_state",
        "description": "I/O space select strobe output."
      },
      {
        "number": "23",
        "name": "R/W",
        "type": "tri_state",
        "description": "Read/write signal output for external accesses."
      },
      {
        "number": "24",
        "name": "MSTRB",
        "type": "tri_state",
        "description": "Memory strobe output for external memory accesses."
      },
      {
        "number": "25",
        "name": "IOSTRB",
        "type": "tri_state",
        "description": "I/O strobe output for external I/O accesses."
      },
      {
        "number": "26",
        "name": "MSC",
        "type": "output",
        "description": "Microstate complete output."
      },
      {
        "number": "27",
        "name": "XF",
        "type": "output",
        "description": "External flag output; general-purpose output pin."
      },
      {
        "number": "28",
        "name": "HOLDA",
        "type": "output",
        "description": "Hold acknowledge output."
      },
      {
        "number": "29",
        "name": "IAQ",
        "type": "tri_state",
        "description": "Instruction acquisition output."
      },
      {
        "number": "30",
        "name": "HOLD",
        "type": "input",
        "description": "Hold request input."
      },
      {
        "number": "31",
        "name": "BIO",
        "type": "input",
        "description": "Branch control input; general-purpose input pin."
      },
      {
        "number": "32",
        "name": "MP/MC",
        "type": "input",
        "description": "Microprocessor/microcomputer mode select input."
      },
      {
        "number": "33",
        "name": "DVDD",
        "type": "power_in",
        "description": "3.3-V supply for the I/O pins."
      },
      {
        "number": "34",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "35",
        "name": "DAAEN",
        "type": "input",
        "description": "DAA enable pin."
      },
      {
        "number": "36",
        "name": "BFSRX2",
        "type": "bidirectional",
        "description": "McBSP2 frame sync pin used for the DAA interface; usable as general-purpose I/O."
      },
      {
        "number": "37",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "38",
        "name": "TX",
        "type": "output",
        "description": "UART transmit data output (SOUT)."
      },
      {
        "number": "39",
        "name": "HCNTL0",
        "type": "input",
        "description": "Host-port interface control input 0."
      },
      {
        "number": "40",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "41",
        "name": "BCLKR0",
        "type": "bidirectional",
        "description": "McBSP0 receive clock; usable as general-purpose I/O."
      },
      {
        "number": "42",
        "name": "BCLKR1",
        "type": "bidirectional",
        "description": "McBSP1 receive clock; usable as general-purpose I/O."
      },
      {
        "number": "43",
        "name": "BFSR0",
        "type": "bidirectional",
        "description": "McBSP0 receive frame sync; usable as general-purpose I/O."
      },
      {
        "number": "44",
        "name": "BFSR1",
        "type": "bidirectional",
        "description": "McBSP1 receive frame sync; usable as general-purpose I/O."
      },
      {
        "number": "45",
        "name": "BDR0",
        "type": "input",
        "description": "McBSP0 serial data receive; usable as general-purpose input."
      },
      {
        "number": "46",
        "name": "HCNTL1",
        "type": "input",
        "description": "Host-port interface control input 1."
      },
      {
        "number": "47",
        "name": "BDR1",
        "type": "input",
        "description": "McBSP1 serial data receive; usable as general-purpose input."
      },
      {
        "number": "48",
        "name": "BCLKX0",
        "type": "bidirectional",
        "description": "McBSP0 transmit clock; usable as general-purpose I/O."
      },
      {
        "number": "49",
        "name": "BCLKX1",
        "type": "bidirectional",
        "description": "McBSP1 transmit clock; usable as general-purpose I/O."
      },
      {
        "number": "50",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "51",
        "name": "HINT/TOUT1",
        "type": "output",
        "description": "Host-port interrupt output / Timer 1 output."
      },
      {
        "number": "52",
        "name": "CVDD",
        "type": "power_in",
        "description": "1.5-V supply for the core CPU."
      },
      {
        "number": "53",
        "name": "BFSX0",
        "type": "bidirectional",
        "description": "McBSP0 transmit frame sync; usable as general-purpose I/O."
      },
      {
        "number": "54",
        "name": "BFSX1",
        "type": "bidirectional",
        "description": "McBSP1 transmit frame sync; usable as general-purpose I/O."
      },
      {
        "number": "55",
        "name": "HRDY",
        "type": "output",
        "description": "Host-port interface ready output."
      },
      {
        "number": "56",
        "name": "DVDD",
        "type": "power_in",
        "description": "3.3-V supply for the I/O pins."
      },
      {
        "number": "57",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "58",
        "name": "HD0",
        "type": "bidirectional",
        "description": "HPI data bus bit 0, also general-purpose I/O (UART DTR input by default in CST software)."
      },
      {
        "number": "59",
        "name": "BDX0",
        "type": "output",
        "description": "McBSP0 serial data transmit; usable as general-purpose output."
      },
      {
        "number": "60",
        "name": "BDX1",
        "type": "output",
        "description": "McBSP1 serial data transmit; usable as general-purpose output."
      },
      {
        "number": "61",
        "name": "IACK",
        "type": "output",
        "description": "Interrupt acknowledge output."
      },
      {
        "number": "62",
        "name": "HBIL",
        "type": "input",
        "description": "Host-port interface byte identification input."
      },
      {
        "number": "63",
        "name": "NMI",
        "type": "input",
        "description": "Nonmaskable interrupt input."
      },
      {
        "number": "64",
        "name": "INT0",
        "type": "input",
        "description": "External user interrupt 0 input."
      },
      {
        "number": "65",
        "name": "INT1",
        "type": "input",
        "description": "External user interrupt 1 input."
      },
      {
        "number": "66",
        "name": "INT2",
        "type": "input",
        "description": "External user interrupt 2 input."
      },
      {
        "number": "67",
        "name": "INT3",
        "type": "input",
        "description": "External user interrupt 3 input, ORed with Timer 1 interrupt; tie high if Timer1 interrupt is used."
      },
      {
        "number": "68",
        "name": "CVDD",
        "type": "power_in",
        "description": "1.5-V supply for the core CPU."
      },
      {
        "number": "69",
        "name": "HD1",
        "type": "bidirectional",
        "description": "HPI data bus bit 1, also general-purpose I/O (UART RTS input by default in CST software)."
      },
      {
        "number": "70",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "71",
        "name": "RX",
        "type": "input",
        "description": "UART receive data input (SIN)."
      },
      {
        "number": "72",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "73",
        "name": "C1A",
        "type": "bidirectional",
        "description": "Capacitively coupled isolation link to Si3016 C1B; driver rated for max 10 pF load."
      },
      {
        "number": "74",
        "name": "C1A5V",
        "type": "power_in",
        "description": "5-V supply input used only by the C1A driver; needs a 0.22 uF bypass close to the pin."
      },
      {
        "number": "75",
        "name": "DVDD",
        "type": "power_in",
        "description": "3.3-V supply for the I/O pins."
      },
      {
        "number": "76",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "77",
        "name": "CLKMD1",
        "type": "input",
        "description": "Clock mode select 1, sampled while RS is low to set the reset clock mode."
      },
      {
        "number": "78",
        "name": "CLKMD2",
        "type": "input",
        "description": "Clock mode select 2, sampled while RS is low to set the reset clock mode."
      },
      {
        "number": "79",
        "name": "CLKMD3",
        "type": "input",
        "description": "Clock mode select 3, sampled while RS is low to set the reset clock mode."
      },
      {
        "number": "80",
        "name": "HPI16",
        "type": "input",
        "description": "HPI16 mode select; when high, A0-A15 address internal memory via the HPI."
      },
      {
        "number": "81",
        "name": "HD2",
        "type": "bidirectional",
        "description": "HPI data bus bit 2, also general-purpose I/O (UART CTS output by default in CST software)."
      },
      {
        "number": "82",
        "name": "TOUT",
        "type": "output",
        "description": "Timer output."
      },
      {
        "number": "83",
        "name": "EMU0",
        "type": "bidirectional",
        "description": "Emulator interrupt 0 pin."
      },
      {
        "number": "84",
        "name": "EMU1/OFF",
        "type": "bidirectional",
        "description": "Emulator interrupt 1 / OFF; when low, address and data buses go high-impedance."
      },
      {
        "number": "85",
        "name": "TDO",
        "type": "output",
        "description": "JTAG test data output."
      },
      {
        "number": "86",
        "name": "TDI",
        "type": "input",
        "description": "JTAG test data input with internal pullup."
      },
      {
        "number": "87",
        "name": "TRST",
        "type": "input",
        "description": "JTAG test reset with internal pulldown; a 470-ohm external pulldown is required."
      },
      {
        "number": "88",
        "name": "TCK",
        "type": "input",
        "description": "JTAG test clock input with internal pullup."
      },
      {
        "number": "89",
        "name": "TMS",
        "type": "input",
        "description": "JTAG test mode select input with internal pullup."
      },
      {
        "number": "90",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "91",
        "name": "CVDD",
        "type": "power_in",
        "description": "1.5-V supply for the core CPU."
      },
      {
        "number": "92",
        "name": "HPIENA",
        "type": "input",
        "description": "HPI enable input with internal pulldown."
      },
      {
        "number": "93",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "94",
        "name": "CLKOUT",
        "type": "output",
        "description": "Clock output; can be disabled with CLKOUT off control."
      },
      {
        "number": "95",
        "name": "HD3",
        "type": "bidirectional",
        "description": "HPI data bus bit 3, also general-purpose I/O (UART DSR output by default in CST software)."
      },
      {
        "number": "96",
        "name": "X1",
        "type": "output",
        "description": "Crystal oscillator output; left unconnected when an external clock drives X2/CLKIN."
      },
      {
        "number": "97",
        "name": "X2/CLKIN",
        "type": "input",
        "description": "Crystal connection / external reference clock input."
      },
      {
        "number": "98",
        "name": "RS",
        "type": "input",
        "description": "Device reset input."
      },
      {
        "number": "99",
        "name": "D0",
        "type": "bidirectional",
        "description": "Data bus bit 0 (LSB); high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "100",
        "name": "D1",
        "type": "bidirectional",
        "description": "Data bus bit 1; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "101",
        "name": "D2",
        "type": "bidirectional",
        "description": "Data bus bit 2; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "102",
        "name": "D3",
        "type": "bidirectional",
        "description": "Data bus bit 3; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "103",
        "name": "D4",
        "type": "bidirectional",
        "description": "Data bus bit 4; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "104",
        "name": "D5",
        "type": "bidirectional",
        "description": "Data bus bit 5; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "105",
        "name": "A16",
        "type": "tri_state",
        "description": "Address bus bit A16; upper address pins address external program space only; high-impedance in hold mode or when OFF is low."
      },
      {
        "number": "106",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "107",
        "name": "A17",
        "type": "tri_state",
        "description": "Address bus bit A17; upper address pins address external program space only; high-impedance in hold mode or when OFF is low."
      },
      {
        "number": "108",
        "name": "A18",
        "type": "tri_state",
        "description": "Address bus bit A18; upper address pins address external program space only; high-impedance in hold mode or when OFF is low."
      },
      {
        "number": "109",
        "name": "A19",
        "type": "tri_state",
        "description": "Address bus bit A19; upper address pins address external program space only; high-impedance in hold mode or when OFF is low."
      },
      {
        "number": "110",
        "name": "A20",
        "type": "tri_state",
        "description": "Address bus bit A20; upper address pins address external program space only; high-impedance in hold mode or when OFF is low."
      },
      {
        "number": "111",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "112",
        "name": "DVDD",
        "type": "power_in",
        "description": "3.3-V supply for the I/O pins."
      },
      {
        "number": "113",
        "name": "D6",
        "type": "bidirectional",
        "description": "Data bus bit 6; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "114",
        "name": "D7",
        "type": "bidirectional",
        "description": "Data bus bit 7; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "115",
        "name": "D8",
        "type": "bidirectional",
        "description": "Data bus bit 8; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "116",
        "name": "D9",
        "type": "bidirectional",
        "description": "Data bus bit 9; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "117",
        "name": "D10",
        "type": "bidirectional",
        "description": "Data bus bit 10; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "118",
        "name": "D11",
        "type": "bidirectional",
        "description": "Data bus bit 11; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "119",
        "name": "D12",
        "type": "bidirectional",
        "description": "Data bus bit 12; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "120",
        "name": "HD4",
        "type": "bidirectional",
        "description": "HPI data bus bit 4, also general-purpose I/O (UART DCD output by default in CST software)."
      },
      {
        "number": "121",
        "name": "D13",
        "type": "bidirectional",
        "description": "Data bus bit 13; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "122",
        "name": "D14",
        "type": "bidirectional",
        "description": "Data bus bit 14; high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "123",
        "name": "D15",
        "type": "bidirectional",
        "description": "Data bus bit 15 (MSB); high-impedance when not outputting or when RS or HOLD asserted; has bus holder."
      },
      {
        "number": "124",
        "name": "HD5",
        "type": "bidirectional",
        "description": "HPI data bus bit 5, also general-purpose I/O (UART RI output by default in CST software)."
      },
      {
        "number": "125",
        "name": "CVDD",
        "type": "power_in",
        "description": "1.5-V supply for the core CPU."
      },
      {
        "number": "126",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "127",
        "name": "HDS1",
        "type": "input",
        "description": "Host-port interface data strobe 1 input."
      },
      {
        "number": "128",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      },
      {
        "number": "129",
        "name": "HDS2",
        "type": "input",
        "description": "Host-port interface data strobe 2 input."
      },
      {
        "number": "130",
        "name": "DVDD",
        "type": "power_in",
        "description": "3.3-V supply for the I/O pins."
      },
      {
        "number": "131",
        "name": "A0",
        "type": "tri_state",
        "description": "Address bus LSB (A0); high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "132",
        "name": "A1",
        "type": "tri_state",
        "description": "Parallel address bus bit A1; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "133",
        "name": "A2",
        "type": "tri_state",
        "description": "Parallel address bus bit A2; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "134",
        "name": "A3",
        "type": "tri_state",
        "description": "Parallel address bus bit A3; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "135",
        "name": "HD6",
        "type": "bidirectional",
        "description": "HPI data bus bit 6, also usable as general-purpose I/O."
      },
      {
        "number": "136",
        "name": "A4",
        "type": "tri_state",
        "description": "Parallel address bus bit A4; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "137",
        "name": "A5",
        "type": "tri_state",
        "description": "Parallel address bus bit A5; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "138",
        "name": "A6",
        "type": "tri_state",
        "description": "Parallel address bus bit A6; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "139",
        "name": "A7",
        "type": "tri_state",
        "description": "Parallel address bus bit A7; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "140",
        "name": "A8",
        "type": "tri_state",
        "description": "Parallel address bus bit A8; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "141",
        "name": "A9",
        "type": "tri_state",
        "description": "Parallel address bus bit A9; high-impedance in hold mode or when OFF is low; HPI address input when HPI16 is high."
      },
      {
        "number": "142",
        "name": "CVDD",
        "type": "power_in",
        "description": "1.5-V supply for the core CPU."
      },
      {
        "number": "143",
        "name": "A21",
        "type": "tri_state",
        "description": "Address bus bit A21; upper address pins address external program space only; high-impedance in hold mode or when OFF is low."
      },
      {
        "number": "144",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground for both the I/O pins and the core CPU."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text+vision",
        "consensus_model": "claude-opus-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Descriptions for control/strobe pins (HAS, HCS, HR/W, READY, PS, DS, IS, R/W, MSTRB, IOSTRB, MSC, HO; VSS, CVDD and DVDD appear on many pins; the pin names are repeated and not unique.",
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 100,
        "cost_usd": 1.9614,
        "at": "2026-10-11T23:16:15"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tms320c54cst",
        "pages": 177,
        "sha256": "64b3abcace713a90",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 144,
        "described": 144,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tms320c54cstpge.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          22.0,
          22.0,
          1.5
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b4d698da8bb7697b754adb5655c932342462d9b9341cdaa081b3604dbdf7559b",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tms320c54cstpge-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          22.0,
          22.0,
          1.5
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "34a81ccfa952c3e6569aa07c69ba7c966ae7174974c73ffb46de3c7b92a3acb9",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}