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docs tmp75aidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
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tmp75aidr-etched.fit.json tmp75aidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tmp75aidr-etched.glb tmp75aidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tmp75aidr-etched.step tmp75aidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tmp75aidr.glb Publish 0.1.0 · Ray 27d ago
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tmp75aidr.step Publish 0.1.0 · Ray 27d ago

TMP75AIDR

Texas Instruments · Temperature Sensors · SOIC-8

TMP75AIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SDA bidirectional Serial data line for I2C/SMBus interface. Open-drain output; requires an external pull-up resistor (typically 4.7 kΩ to V+).
2 SCL input Serial clock input for I2C/SMBus interface. Open-drain compatible; requires an external pull-up resistor (typically 4.7 kΩ to V+).
3 ALERT output Over-temperature alert output (SMBus Alert). Open-drain output; requires an external pull-up resistor. Asserts when measured temperature crosses the programmed limit.
4 GND power_in Device ground reference. Connect to system ground.
5 A2 input I2C slave address select bit 2. Tie to GND or V+ to program the device address. On TMP175 this pin may also be left floating for extra address states; on TMP75 tie to a valid logic level.
6 A1 input I2C slave address select bit 1. Tie to GND or V+ to program the device address. On TMP175 this pin may also be left floating for extra address states.
7 A0 input I2C slave address select bit 0. Tie to GND or V+ to program the device address. On TMP175 this pin may also be left floating for extra address states.
8 V+ power_in Positive supply voltage input, 2.7 V to 5.5 V. Bypass to GND with 0.01 µF (updated recommendation in rev M) close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Sensors
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • TMP75AIDR
  • TMP75AIDRAIDGKR
  • TMP75AIDRAIDGK

CAD (KiCad official)

  • Symbol: TMP75AIDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tmp75aidr-etched.step / tmp75aidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tmp75aidr.step / tmp75aidr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 cbc05025eccbda21, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF