component
TMP124AIDR
Public Made by Adomby adom
Texas Instruments Temperature Sensors, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
| package.json | 13d ago |
| page.json | 13d ago |
| README.md | 13d ago |
| tmp124aidr-etched.glb | 13d ago |
| tmp124aidr-etched.step | 13d ago |
| tmp124aidr-hero.glb | 12d ago |
| tmp124aidr-hero.overlay.json | 13d ago |
| tmp124aidr.glb | 13d ago |
| tmp124aidr.kicad_mod | 13d ago |
| tmp124aidr.kicad_sym | 13d ago |
| tmp124aidr.lbr | 13d ago |
| tmp124aidr.step | 13d ago |
TMP124AIDR
Texas Instruments · Temperature Sensors · SOIC-8
TMP124AIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SO/I | bidirectional | Serial data line used as SPI output for readings and as input for commands; VOL is 0.4 V max at 3 mA sink, VOH is (V+)-0.4 V min at 2 mA source, and input current is ±1 µA for 0 V to V+. |
| 2 | SCK | input | SPI serial clock input; logic high is VIH ≥ 0.7(V+) and logic low is VIL ≤ 0.3(V+), with a minimum SCK period of 100 ns and input current of ±1 µA. |
| 3 | NC | unconnected | No internal connection; the datasheet says this pin should be left open or floating. |
| 4 | GND | power_in | Device ground reference for the supply and digital interface. |
| 5 | ALERT | output | Open-drain alert output that requires an external pull-up resistor; VOL is 0.4 V max at 4 mA sink, leakage is ±1 µA for 0 V to 6 V, and polarity is set by the POL bit (active LOW by default). |
| 6 | NC | unconnected | No internal connection; the datasheet says this pin should be left open or floating. |
| 7 | CS | input | Chip select input; pulling CS low initiates communication with the device, and CS must meet the listed set-up and output timing (t5 min 40 ns, t6 max 30 ns). |
| 8 | V+ | power_in | Supply voltage input, specified for 2.7 V to 5.5 V, to be bypassed with a 0.1 µF capacitor to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Sensors |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TMP124AIDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tmp124aidr-etched.step/tmp124aidr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tmp124aidr.step/tmp124aidr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
1b44d3ad5232161d, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).