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verification.json Verified: Published by the parts factory: tier lcsc, 8 pins · Ray 3d ago

TMN10010S

Tritech-MOS · MOSFETs · SOP-8

TMN10010S from Tritech-MOS, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET; the datasheet states no separate electrical limit for this pin beyond the device ratings of VDS 100V and ID 10A.
2 S passive Source terminal of the N-channel MOSFET; the datasheet states no separate electrical limit for this pin beyond the device ratings of VDS 100V and ID 10A.
3 S passive Source terminal of the N-channel MOSFET; the datasheet states no separate electrical limit for this pin beyond the device ratings of VDS 100V and ID 10A.
4 G input Gate terminal; the absolute maximum gate-source voltage is VGS ±20V.
5 D passive Drain terminal; the absolute maximum drain-source voltage is VDS 100V and continuous drain current is 10A at TC=25℃.
6 D passive Drain terminal; the absolute maximum drain-source voltage is VDS 100V and continuous drain current is 10A at TC=25℃.
7 D passive Drain terminal; the absolute maximum drain-source voltage is VDS 100V and continuous drain current is 10A at TC=25℃.
8 D passive Drain terminal; the absolute maximum drain-source voltage is VDS 100V and continuous drain current is 10A at TC=25℃.

Key specifications

Parameter Value
Manufacturer Tritech-MOS
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage V(BR)DSS 100 V VGS=0V, ID=250μA 2
Zero Gate Voltage Drain Current IDSS 1 μA VDS=100V, VGS=0V 2
Gate to Body Leakage Current IGSS -100 100 nA VDS=0V, VGS=±20V 2
Gate Threshold Voltage VGS(th) 1 1.5 2.5 V VDS=VGS, ID=250μA 2
Static Drain-Source on-Resistance RDS(on) 88 115 mΩ VGS=10V, ID=3A 2
Static Drain-Source on-Resistance RDS(on) 100 140 mΩ VGS=4.5V, ID=2A 2
Maximum Continuous Drain to Source Diode Forward Current IS 10 A 2
Maximum Pulsed Drain to Source Diode Forward Current ISM 12 A 2
Drain to Source Diode Forward Voltage VSD 1.2 V VGS=0V, IS=3A 2
Drain-Source Voltage VDS 100 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID@TC=25℃ 10 A VGS @ 10V 1
Continuous Drain Current ID@TC=100℃ 5 A VGS @ 10V 1
Pulsed Drain Current IDM 10 A 1
Single Pulse Avalanche Energy EAS 6.1 mJ 1
Total Power Dissipation PD@TA=25℃ 5 W TA=25℃ 1
Storage Temperature Range TSTG -55 150 ℃ 1
Operating Junction Temperature Range TJ -55 150 ℃ 1
Thermal Resistance Junction-ambient RθJA 125 ℃/W 1
Thermal Resistance Junction-Case RθJC 3.6 ℃/W 1

CAD (KiCad official)

  • Symbol: TMN10010S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: tmn10010s-etched.step / tmn10010s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tmn10010s.step / tmn10010s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Tritech-MOS datasheet (5 pp, sha256 8e936d227ea66345, retrieved 2026-11-04, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF