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TMI4101A
Public Made by Adomby adom
TMI Battery Management ICs, SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TMI4101A
TMI · Battery Management ICs · SSOP-28
TMI4101A from TMI, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CHSE | input | Charger detection pin with an internal pull-up (RCHSE 1800-3000 kΩ), where a charger is detected when the CHSE level is at or below VCHSE (0.6-1.5 V), and the absolute range is VDD-80 V to VDD+0.3 V. |
| 2 | CHG | output | Charge MOSFET control output with a source current of 8-12 μA (ICHG, typ. 10 μA) that goes high-impedance during overcharge, over-discharge load-lock, and other protection states, with an absolute range of VDD-80 V to VDD+0.3 V. |
| 3 | VM | input | Load detection pin with an internal pull-down (RVM 15-35 kΩ), where a load is detected when the VM level reaches VVM (1.05-1.35 V), and the absolute range is VDD-80 V to VDD+0.3 V. |
| 4 | DSG | output | Discharge MOSFET control output whose high level is 11.5-13.5 V when VDD > 13 V or VDD-1 to VDD-0.7 V when VDD < 13 V, and whose low level is at most 0.2 V. |
| 5 | CTL | bidirectional | DSG output control pin with priority over the internal protection circuit, where GND forces DSG low and CHG high-impedance, and floating gives normal operation; its absolute range is GND-0.3 V to 5.5 V. |
| 6 | DS | bidirectional | Test pin that shortens the delay times, with a test-high level of 3.5-4.5 V and a test-low level of 0-0.3 V, and an absolute range of GND-0.3 V to 5.5 V. |
| 7 | DSD | bidirectional | Connection pin for the external capacitor that sets the over-discharge protection delay, giving tUV of 1.0-2.0 s with a 0.1 μF ±10% capacitor, and an absolute range of GND-0.3 V to 5.5 V. |
| 8 | CDC | bidirectional | Connection pin for the external capacitor that sets the discharge over-current 1 and 2 delays, giving tDOC1 of 0.5-1.5 s with a 0.1 μF ±10% capacitor, and an absolute range of GND-0.3 V to 5.5 V. |
| 9 | TS1 | input | Temperature resistor connection pin, for which the datasheet recommends an NTC 103AT (β = 3435), and an absolute range of GND-0.3 V to 5.5 V. |
| 10 | TS0 | input | Temperature resistor connection pin, for which the datasheet recommends an NTC 103AT (β = 3435), and an absolute range of GND-0.3 V to 5.5 V. |
| 11 | RSENP | input | Positive input of the current-sense pair used for discharge, charge, and short-circuit detection, with an absolute range of GND-0.3 V to 5.5 V. |
| 12 | RSENN | input | Negative input of the current-sense pair used for discharge, charge, and short-circuit detection, with an absolute range of GND-0.3 V to 5.5 V. |
| 13 | SEL0 | input | 7/8/9/10-cell application select pin, where VSELH is VDD-0.6 to VDD-0.1 V and VSELL is at most 0.6 V, and the absolute range is GND-0.3 V to VDD+0.3 V. |
| 14 | SEL1 | input | 7/8/9/10-cell application select pin, where VSELH is VDD-0.6 to VDD-0.1 V and VSELL is at most 0.6 V, and the absolute range is GND-0.3 V to VDD+0.3 V. |
| 15 | VS | power_in | Mode selection pin whose function the datasheet gives only as 模式选择 (mode selection), with an absolute range of GND-0.3 V to 5.5 V. |
| 16 | GND | power_in | Power ground connection pin, the reference for the device. |
| 17 | VC1 | input | Positive terminal connection for cell 1, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 18 | VC2 | input | Positive terminal connection for cell 2, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 19 | VC3 | input | Positive terminal connection for cell 3, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 20 | VC4 | input | Positive terminal connection for cell 4, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 21 | VC5 | input | Positive terminal connection for cell 5, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 22 | VC6 | input | Positive terminal connection for cell 6, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 23 | VC6 | input | Positive terminal connection for cell 6 as printed in the datasheet (duplicate label of pin 22), with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 24 | VC7 | input | Positive terminal connection for cell 7, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 25 | VC8 | input | Positive terminal connection for cell 8, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 26 | VC9 | input | Positive terminal connection for cell 9, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 27 | VC10 | input | Positive terminal connection for the highest cell (cell 10), with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 28 | VDD | power_in | Positive power supply connection pin, with an operating range of 3 V to 80 V and an absolute maximum of 80 V above GND (VDD-GND -0.3 V to 80 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TMI |
| Package | SSOP-28 |
| Category | Power Supply Chip |
| Pins | 28 |
CAD (KiCad official)
- Symbol:
TMI4101A - Footprint:
Package_SO:SSOP-28_3.9x9.9mm_P0.635mm - 3D model: SSOP-28 (KiCad packages3D, STEP)
- 3D model files:
tmi4101a-etched.step/tmi4101a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tmi4101a.step/tmi4101a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TMI datasheet (21 pp, sha256
1d6cecb0255c70af, retrieved 2026-10-30, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TMI4101A
**TMI** · Battery Management ICs · SSOP-28
TMI4101A from TMI, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CHSE | input | Charger detection pin with an internal pull-up (RCHSE 1800-3000 kΩ), where a charger is detected when the CHSE level is at or below VCHSE (0.6-1.5 V), and the absolute range is VDD-80 V to VDD+0.3 V. |
| 2 | CHG | output | Charge MOSFET control output with a source current of 8-12 μA (ICHG, typ. 10 μA) that goes high-impedance during overcharge, over-discharge load-lock, and other protection states, with an absolute range of VDD-80 V to VDD+0.3 V. |
| 3 | VM | input | Load detection pin with an internal pull-down (RVM 15-35 kΩ), where a load is detected when the VM level reaches VVM (1.05-1.35 V), and the absolute range is VDD-80 V to VDD+0.3 V. |
| 4 | DSG | output | Discharge MOSFET control output whose high level is 11.5-13.5 V when VDD > 13 V or VDD-1 to VDD-0.7 V when VDD < 13 V, and whose low level is at most 0.2 V. |
| 5 | CTL | bidirectional | DSG output control pin with priority over the internal protection circuit, where GND forces DSG low and CHG high-impedance, and floating gives normal operation; its absolute range is GND-0.3 V to 5.5 V. |
| 6 | DS | bidirectional | Test pin that shortens the delay times, with a test-high level of 3.5-4.5 V and a test-low level of 0-0.3 V, and an absolute range of GND-0.3 V to 5.5 V. |
| 7 | DSD | bidirectional | Connection pin for the external capacitor that sets the over-discharge protection delay, giving tUV of 1.0-2.0 s with a 0.1 μF ±10% capacitor, and an absolute range of GND-0.3 V to 5.5 V. |
| 8 | CDC | bidirectional | Connection pin for the external capacitor that sets the discharge over-current 1 and 2 delays, giving tDOC1 of 0.5-1.5 s with a 0.1 μF ±10% capacitor, and an absolute range of GND-0.3 V to 5.5 V. |
| 9 | TS1 | input | Temperature resistor connection pin, for which the datasheet recommends an NTC 103AT (β = 3435), and an absolute range of GND-0.3 V to 5.5 V. |
| 10 | TS0 | input | Temperature resistor connection pin, for which the datasheet recommends an NTC 103AT (β = 3435), and an absolute range of GND-0.3 V to 5.5 V. |
| 11 | RSENP | input | Positive input of the current-sense pair used for discharge, charge, and short-circuit detection, with an absolute range of GND-0.3 V to 5.5 V. |
| 12 | RSENN | input | Negative input of the current-sense pair used for discharge, charge, and short-circuit detection, with an absolute range of GND-0.3 V to 5.5 V. |
| 13 | SEL0 | input | 7/8/9/10-cell application select pin, where VSELH is VDD-0.6 to VDD-0.1 V and VSELL is at most 0.6 V, and the absolute range is GND-0.3 V to VDD+0.3 V. |
| 14 | SEL1 | input | 7/8/9/10-cell application select pin, where VSELH is VDD-0.6 to VDD-0.1 V and VSELL is at most 0.6 V, and the absolute range is GND-0.3 V to VDD+0.3 V. |
| 15 | VS | power_in | Mode selection pin whose function the datasheet gives only as 模式选择 (mode selection), with an absolute range of GND-0.3 V to 5.5 V. |
| 16 | GND | power_in | Power ground connection pin, the reference for the device. |
| 17 | VC1 | input | Positive terminal connection for cell 1, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 18 | VC2 | input | Positive terminal connection for cell 2, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 19 | VC3 | input | Positive terminal connection for cell 3, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 20 | VC4 | input | Positive terminal connection for cell 4, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 21 | VC5 | input | Positive terminal connection for cell 5, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 22 | VC6 | input | Positive terminal connection for cell 6, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 23 | VC6 | input | Positive terminal connection for cell 6 as printed in the datasheet (duplicate label of pin 22), with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 24 | VC7 | input | Positive terminal connection for cell 7, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 25 | VC8 | input | Positive terminal connection for cell 8, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 26 | VC9 | input | Positive terminal connection for cell 9, with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 27 | VC10 | input | Positive terminal connection for the highest cell (cell 10), with an absolute range of GND-0.3 V to VDD+0.3 V. |
| 28 | VDD | power_in | Positive power supply connection pin, with an operating range of 3 V to 80 V and an absolute maximum of 80 V above GND (VDD-GND -0.3 V to 80 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TMI |
| Package | SSOP-28 |
| Category | Power Supply Chip |
| Pins | 28 |
## CAD (KiCad official)
- Symbol: `TMI4101A`
- Footprint: `Package_SO:SSOP-28_3.9x9.9mm_P0.635mm`
- 3D model: SSOP-28 (KiCad packages3D, STEP)
- 3D model files: `tmi4101a-etched.step` / `tmi4101a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tmi4101a.step` / `tmi4101a.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TMI datasheet](docs/tmi4101a-datasheet.pdf) (21 pp, sha256 `1d6cecb0255c70af`, retrieved 2026-10-30, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tmi4101a-datasheet.pdf)