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TMDS442PNPR

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Texas Instruments Interface - Specialized, LQFP-128(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TMDS442PNPR

Texas Instruments · Interface - Specialized · LQFP-128(14x14)

TMDS442PNPR from Texas Instruments, in a LQFP-128(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
2 HPD1 output Source port 1 hot plug detector output, pulled down internally so it stays low until a valid high is received.
3 5V_PWR1 input Source port 1 5-V power signal input, pulled down internally so it stays low until a valid high is received; absolute maximum 6 V.
4 SDA1 bidirectional Source port 1 DDC I2C data line, buffered by an I2C repeater that isolates bus capacitance; absolute maximum 6 V.
5 SCL1 bidirectional Source port 1 DDC I2C clock line, buffered by an I2C repeater that isolates bus capacitance; absolute maximum 6 V.
6 GND power_in Ground reference for the device.
7 B11 input Source port 1 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
8 A11 input Source port 1 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
9 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
10 B12 input Source port 1 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
11 A12 input Source port 1 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
12 GND power_in Ground reference for the device.
13 B13 input Source port 1 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
14 A13 input Source port 1 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
15 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
16 B14 input Source port 1 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
17 A14 input Source port 1 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
18 GND power_in Ground reference for the device.
19 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
20 GPIO0 (SA1) bidirectional GPIO0, used as SA1, the sink port 1 source selector control.
21 GPIO1 (SB1) bidirectional GPIO1, used as SB1, the sink port 1 source selector control.
22 GPIO2 (/OE1) bidirectional GPIO2, used as /OE1, the sink port 1 TMDS output enable.
23 GPIO3 (I2CEN1) bidirectional GPIO3, used as I2CEN1, the sink port 1 DDC I2C output enable.
24 GPIO4 (PRE1) bidirectional GPIO4, used as PRE1, the sink port 1 TMDS AC de-emphasis mode selector.
25 GPIO5 (SA2) bidirectional GPIO5, used as SA2, the sink port 2 source selector control.
26 GPIO6 (SB2) bidirectional GPIO6, used as SB2, the sink port 2 source selector control.
27 GPIO7 (/OE2) bidirectional GPIO7, used as /OE2, the sink port 2 TMDS output enable.
28 GPIO8 (I2CEN2) bidirectional GPIO8, used as I2CEN2, the sink port 2 DDC I2C output enable.
29 GPIO9 (PRE2) bidirectional GPIO9, used as PRE2, the sink port 2 TMDS AC de-emphasis mode selector.
30 GPIO10 (SP) bidirectional GPIO10, used as SP, the sink priority selector.
31 GE input GPIO enable: low selects the local I2C pins as active with GPIO pins high impedance; high selects GPIO pins as active with local I2C pins high impedance.
32 OVS bidirectional GPIO11, used as OVS, the SCL_SINK/SDA_SINK output voltage select.
33 GND power_in Ground reference for the device.
34 Y24 output Sink port 2 TMDS positive output; high impedance when disabled.
35 Z24 output Sink port 2 TMDS negative output; high impedance when disabled.
36 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
37 Y23 output Sink port 2 TMDS positive output; high impedance when disabled.
38 Z23 output Sink port 2 TMDS negative output; high impedance when disabled.
39 GND power_in Ground reference for the device.
40 Y22 output Sink port 2 TMDS positive output; high impedance when disabled.
41 Z22 output Sink port 2 TMDS negative output; high impedance when disabled.
42 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
43 Y21 output Sink port 2 TMDS positive output; high impedance when disabled.
44 Z21 output Sink port 2 TMDS negative output; high impedance when disabled.
45 GND power_in Ground reference for the device.
46 SCL_SINK2 bidirectional Sink port 2 DDC I2C clock line; absolute maximum 6 V.
47 SDA_SINK2 bidirectional Sink port 2 DDC I2C data line; absolute maximum 6 V.
48 5V_SINK2 output Sink port 2 5-V power indicator output, pulled down internally so it stays low until a valid high is received.
49 HPD_SINK2 input Sink port 2 hot plug detector input; absolute maximum 6 V.
50 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
51 VSADJ input TMDS compliant voltage swing control; set by an external resistor of 4.6 to 4.68 kΩ.
52 GND power_in Ground reference for the device.
53 Y14 output Sink port 1 TMDS positive output; high impedance when disabled.
54 Z14 output Sink port 1 TMDS negative output; high impedance when disabled.
55 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
56 Y13 output Sink port 1 TMDS positive output; high impedance when disabled.
57 Z13 output Sink port 1 TMDS negative output; high impedance when disabled.
58 GND power_in Ground reference for the device.
59 Y12 output Sink port 1 TMDS positive output; high impedance when disabled.
60 Z12 output Sink port 1 TMDS negative output; high impedance when disabled.
61 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
62 Y11 output Sink port 1 TMDS positive output; high impedance when disabled.
63 Z11 output Sink port 1 TMDS negative output; high impedance when disabled.
64 GND power_in Ground reference for the device.
65 SCL_SINK1 bidirectional Sink port 1 DDC I2C clock line; absolute maximum 6 V.
66 SDA_SINK1 bidirectional Sink port 1 DDC I2C data line; absolute maximum 6 V.
67 5V_SINK1 output Sink port 1 5-V power indicator output, pulled down internally so it stays low until a valid high is received.
68 HPD_SINK1 input Sink port 1 hot plug detector input; absolute maximum 6 V.
69 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
70 GND power_in Ground reference for the device.
71 LC_A1 input Local I2C address bit 1.
72 LC_A0 input Local I2C address bit 0.
73 LC_SDA bidirectional Local I2C data line; control input LVTTL, absolute maximum 4 V.
74 LC_SCL bidirectional Local I2C clock line; control input LVTTL, absolute maximum 4 V.
75 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
76 HPD4 output Source port 4 hot plug detector output.
77 5V_PWR4 input Source port 4 5-V power signal input; absolute maximum 6 V.
78 SDA4 bidirectional Source port 4 DDC I2C data line; absolute maximum 6 V.
79 SCL4 bidirectional Source port 4 DDC I2C clock line; absolute maximum 6 V.
80 GND power_in Ground reference for the device.
81 B41 input Source port 4 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
82 A41 input Source port 4 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
83 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
84 B42 input Source port 4 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
85 A42 input Source port 4 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
86 GND power_in Ground reference for the device.
87 B43 input Source port 4 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
88 A43 input Source port 4 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
89 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
90 B44 input Source port 4 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
91 A44 input Source port 4 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
92 GND power_in Ground reference for the device.
93 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
94 HPD3 output Source port 3 hot plug detector output.
95 5V_PWR3 input Source port 3 5-V power signal input; absolute maximum 6 V.
96 SDA3 bidirectional Source port 3 DDC I2C data line; absolute maximum 6 V.
97 SCL3 bidirectional Source port 3 DDC I2C clock line; absolute maximum 6 V.
98 GND power_in Ground reference for the device.
99 B31 input Source port 3 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
100 A31 input Source port 3 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
101 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
102 B32 input Source port 3 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
103 A32 input Source port 3 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
104 GND power_in Ground reference for the device.
105 B33 input Source port 3 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
106 A33 input Source port 3 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
107 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
108 B34 input Source port 3 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
109 A34 input Source port 3 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
110 GND power_in Ground reference for the device.
111 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
112 HPD2 output Source port 2 hot plug detector output.
113 5V_PWR2 input Source port 2 5-V power signal input; absolute maximum 6 V.
114 SDA2 bidirectional Source port 2 DDC I2C data line; absolute maximum 6 V.
115 SCL2 bidirectional Source port 2 DDC I2C clock line; absolute maximum 6 V.
116 GND power_in Ground reference for the device.
117 B21 input Source port 2 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
118 A21 input Source port 2 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
119 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
120 B22 input Source port 2 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
121 A22 input Source port 2 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
122 GND power_in Ground reference for the device.
123 B23 input Source port 2 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
124 A23 input Source port 2 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
125 Vcc power_in Power supply, 3.0 V minimum to 3.6 V maximum (3.3 V nominal).
126 B24 input Source port 2 TMDS negative input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
127 A24 input Source port 2 TMDS positive input, with 50-Ω termination to VCC and 8-dB equalizer; differential input 150 to 1560 mVp-p, signaling up to 2.25 Gbps.
128 GND power_in Ground reference for the device.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-128(14x14)
Category Interface
Pins 128

CAD (KiCad official)

  • Symbol: TMDS442PNPR
  • Footprint: Package_QFP:LQFP-128_14x14mm_P0.4mm
  • 3D model: LQFP-128(14x14) (KiCad packages3D, STEP)
  • 3D model files: tmds442pnpr-etched.step / tmds442pnpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tmds442pnpr.step / tmds442pnpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (47 pp, sha256 fed1b169dc376f19, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF