component
TMDS181IRGZR
Public Made by Adomby adom
Texas Instruments Global Sourcing Parts, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTMDS181IRGZR
Texas Instruments · Global Sourcing Parts · VQFN-48-EP(7x7)
TMDS181IRGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SWAP/POL | input | Input lane SWAP and polarity control pin; selects receive lane swap or polarity inversion mode. |
| 2 | IN_D2p | input | Channel 2 differential input positive. |
| 3 | IN_D2n | input | Channel 2 differential input negative. |
| 4 | HPD_SRC | output | Hot plug detect output to source side. |
| 5 | IN_D1p | input | Channel 1 differential input positive. |
| 6 | IN_D1n | input | Channel 1 differential input negative. |
| 7 | GND | power_in | Ground. |
| 8 | IN_D0p | input | Channel 0 differential input positive. |
| 9 | IN_D0n | input | Channel 0 differential input negative. |
| 10 | I2C_EN/PIN | input | I2C control mode enable pin; high enables I2C control, low enables pin strapping mode. |
| 11 | IN_CLKp | input | Clock differential input positive. |
| 12 | IN_CLKn | input | Clock differential input negative. |
| 13 | VCC | power_in | 3.3 V power supply. |
| 14 | VDD | power_in | 1.2 V power supply. |
| 15 | SCL_CTL | input | I2C clock signal for control interface. |
| 16 | SDA_CTL | bidirectional | I2C data signal for control interface. |
| 17 | SIG_EN | input | Signal detector circuit enable pin; high enables signal detect, low disables with internal weak pull down. |
| 18 | NC | unconnected | No connect. |
| 19 | GND | power_in | Ground. |
| 20 | PRE_SEL | input | De-emphasis control pin; low = -2 dB, no connect = 0 dB, high = reserved. |
| 21 | EQ_SEL/A0 | input | Input receive equalization control pin; low = fixed 7.5 dB, no connect = adaptive, high = fixed 14 dB. |
| 22 | VSADJ | input | TMDS-compliant voltage swing control pin with nominal 7.06 kΩ resistor to GND. |
| 23 | VDD | power_in | 1.2 V power supply. |
| 24 | VDD | power_in | 1.2 V power supply. |
| 25 | OUT_CLKn | output | TMDS data clock differential output negative. |
| 26 | OUT_CLKp | output | TMDS data clock differential output positive. |
| 27 | A1 | input | I2C address bit 2 for programming with weak internal pull down; leave no connect in pin strapping mode. |
| 28 | OUT_D0n | output | TMDS data 0 differential output negative. |
| 29 | OUT_D0p | output | TMDS data 0 differential output positive. |
| 30 | GND | power_in | Ground; thermal pad. |
| 31 | OUT_D1n | output | TMDS data 1 differential output negative. |
| 32 | OUT_D1p | output | TMDS data 1 differential output positive. |
| 33 | HPD_SNK | input | Hot plug detect input from sink side. |
| 34 | OUT_D2n | output | TMDS data 2 differential output negative. |
| 35 | OUT_D2p | output | TMDS data 2 differential output positive. |
| 36 | TX_TERM_CTL | input | Transmit termination control pin; high = no termination, low = 75-150 Ω, no connect = auto select. |
| 37 | VDD | power_in | 1.2 V power supply. |
| 38 | SCL_SNK | bidirectional | Sink side TMDS port bidirectional DDC clock line. |
| 39 | SDA_SNK | bidirectional | Sink side TMDS port bidirectional DDC data line. |
| 40 | NC | unconnected | No connect. |
| 41 | GND | power_in | Ground. |
| 42 | OE | input | Operation enable/reset pin; low = power down, high = normal operation with internal weak pull up. |
| 43 | VCC | power_in | 3.3 V power supply. |
| 44 | ARC_OUT | bidirectional | Audio return channel output. |
| 45 | SPDIF_IN | bidirectional | SPDIF signal input. |
| 46 | SCL_SRC | bidirectional | Source side TMDS port bidirectional DDC clock line. |
| 47 | SDA_SRC | bidirectional | Source side TMDS port bidirectional DDC data line. |
| 48 | VDD | power_in | 1.2 V power supply. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48-EP(7x7) |
| Category | Global Sourcing Parts |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
TMDS181IRGZR - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
tmds181irgzr-etched.step/tmds181irgzr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tmds181irgzr.step/tmds181irgzr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (59 pp, sha256
80f8eef3073a8094, retrieved 2026-10-06, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).