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TMC2660C-PA-T

TRINAMIC Motion Control GmbH · Stepper Motor Driver · PQFP-44

TMC2660C-PA-T from TRINAMIC Motion Control GmbH, in a PQFP-44. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 n.c. unconnected No internal connection - can be tied to any net, e.g., to improve power routing to pins VSA and VSB.
2 OA1 output Bridge A1 output; interconnect all OA1 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
3 OA1 output Bridge A1 output; interconnect all OA1 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
4 VSA power_in Bridge A/B positive power supply; connect to VS and provide sufficient filtering capacity for chopper current ripple.
5 OA2 output Bridge A2 output; interconnect all OA2 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
6 OA2 output Bridge A2 output; interconnect all OA2 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
7 OA1 output Bridge A1 output; interconnect all OA1 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
8 OA1 output Bridge A1 output; interconnect all OA1 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
9 BRA input Bridge A negative power supply via sense resistor at the bridge foot point.
10 OA2 output Bridge A2 output; interconnect all OA2 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
11 OA2 output Bridge A2 output; interconnect all OA2 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
12 SRA input Sense resistor input for chopper current regulation of bridge A.
13 5VOUT power_out Output of the on-chip 5V linear regulator used to supply the low-side MOSFETs and internal analog circuitry; an external 470nF ceramic capacitor to GND close to the pin is required.
14 SDO output SPI serial data output (VIO level).
15 SDI (CFG3) input SPI data input; in standalone mode it selects microstep resolution (0: MRES=256 microsteps, 1: MRES=16 microsteps with interpolation).
16 SCK (CFG2) input SPI serial clock input; in standalone mode it selects chopper hysteresis (0: HEND=4, HSTRT=2; 1: HEND=4, HSTRT=6).
17 GND power_in Digital and analog low power ground; directly connect all GND pins to a common ground area.
18 CSN (CFG1) input SPI chip select input; in standalone mode it selects current scale (0: CS=15, 1: CS=31).
19 ENN input Power MOSFET enable input (active low); all MOSFETs are switched off when disabled.
20 n.c. unconnected No internal connection.
21 CLK input System clock input for all internal operations; tie low to use the on-chip oscillator, a high signal disables the on-chip oscillator until power down.
22 SRB input Sense resistor input for chopper current regulation of bridge B.
23 OB2 output Bridge B2 output; interconnect all OB2 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
24 OB2 output Bridge B2 output; interconnect all OB2 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
25 BRB input Bridge B negative power supply via sense resistor at the bridge foot point.
26 OB1 output Bridge B1 output; interconnect all OB1 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
27 OB1 output Bridge B1 output; interconnect all OB1 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
28 OB2 output Bridge B2 output; interconnect all OB2 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
29 OB2 output Bridge B2 output; interconnect all OB2 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
30 VSB power_in Bridge A/B positive power supply; connect to VS and provide sufficient filtering capacity for chopper current ripple.
31 OB1 output Bridge B1 output; interconnect all OB1 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
32 OB1 output Bridge B1 output; interconnect all OB1 pins using thick traces capable of carrying the motor current and distributing heat into the PCB.
33 n.c. unconnected No internal connection - can be tied to any net, e.g., to improve power routing to pins VSA and VSB.
34 n.c. unconnected No internal connection.
35 VHS power_out High-side supply voltage, stated as motor supply voltage minus 10V.
36 VS power_in Motor supply voltage.
37 TST_ANA / ST_ALONE bidirectional C-Type only: tie to VCC_IO for non-SPI stand-alone mode (internal 10k pulldown); non-C-type: leave open for normal operation.
38 SG_TST output StallGuard2 output that signals a motor stall (active high).
39 GND power_in Digital and analog low power ground; directly connect all GND pins to a common ground area.
40 VCC_IO power_in Input/output supply voltage VIO for all digital pins; operation is allowed in 3.3V and 5V systems (VIO 3.00 V to 5.25 V).
41 DIR input Direction input sampled on an active STEP edge: a low level increases and a high level decreases the microstep counter; a 60-ns internal glitch filter rejects short pulses.
42 STEP input Step input; active edges can be rising or both rising and falling as set by the DEDGE mode bit; a 60-ns internal glitch filter rejects short pulses.
43 TST_MODE input Test mode input that puts the IC into test mode; tie to GND for normal operation.
44 GND power_in Digital and analog low power ground; directly connect all GND pins to a common ground area.

Key specifications

Parameter Value
Manufacturer TRINAMIC Motion Control GmbH
Package PQFP-44
Category Motor Driver ICs
Pins 44

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Junction temperature TJ -40 125 °C 52
Supply voltage TMC2660C VVS 5 29 V 52
I/O supply voltage VVIO 3 5.25 V 52
Supply voltage VVS -0.5 30 V 51
Supply voltage when disabled VVSDIS 60 V (ENN VVIO) with IOXX=0 51
Logic supply voltage VVCC -0.5 6 V 51
I/O supply voltage VVIO -0.5 6 V 51
Logic input voltage VI -0.5 V max printed as VVIO+0.5 51
Analog input voltage VIA -0.5 V max printed as VCC+0.5 51
Relative high-side gate driver voltage (VVM, VHS) VHSVM -0.5 15 V 51
Maximum current to/from digital pins and analog low voltage I/Os IIO -10 10 mA 51
Bridge output peak current IOP -7 7 A 10µs pulse 51
Output current, RMS per coil (running) IOC 2 A 20cm² board with sample layout, TA ≤ 50°C, ≤40kHz chopper, fastest slope, running >4 fullsteps/s 51
Output current, RMS per coil (duty cycle) IOC 2.5 A 20cm² board, TA ≤ 50°C, duty cycle 2s on 6s off 51
Output current, RMS per coil (standstill) IOC 2.2 A 20cm² board, TA ≤ 50°C, standstill, single coil on (halfstep position) 51
Output current, RMS per coil (running) IOC 2.2 A 50cm² board with sample layout, TA ≤ 50°C, ≤40kHz chopper, fastest slope, running >4 fullsteps/s 51
Output current, RMS per coil (duty cycle) IOC 2.8 A 50cm² board, TA ≤ 50°C, duty cycle 2s on 6s off 51
Output current, RMS per coil (standstill) IOC 2.4 A 50cm² board, TA ≤ 50°C, standstill, single coil on (halfstep position) 51
Output current, RMS per coil (running) IOC 1.6 A 20cm² board, TA ≤ 85°C, ≤40kHz chopper, fastest slope, running >4 fullsteps/s 51
Output current, RMS per coil (duty cycle) IOC 2 A 20cm² board, TA ≤ 85°C, duty cycle 2s on 6s off 51
Output current, RMS per coil (standstill) IOC 1.8 A 20cm² board, TA ≤ 85°C, standstill, single coil on (halfstep position) 51
Output current, RMS per coil (running) IOC 1.8 A 50cm² board with sample layout, TA ≤ 85°C, ≤40kHz chopper, fastest slope, running >4 fullsteps/s 51
Output current, RMS per coil (duty cycle) IOC 2.3 A 50cm² board, TA ≤ 85°C, duty cycle 2s on 6s off 51
Output current, RMS per coil (standstill) IOC 2 A 50cm² board, TA ≤ 85°C, standstill, single coil on (halfstep position) 51
5V regulator output current I5VOUT 50 mA 51
5V regulator peak power dissipation (VVM-5V) P5VOUT 1 W 51
Junction temperature TJ -50 150 °C 51
Storage temperature TSTG -55 150 °C 51
ESD-Protection (HBM), in application VESDAP 2 kV 51
ESD-Protection (HBM), device handling VESDDH 300 V 51
Supply current, operating IVS 8 mA VVS=24.0V; fCLK=16MHz, 40kHz chopper 52
Supply current, MOSFETs off IVS 5 mA VVS=24.0V; fCLK=12MHz 52
Static supply current IVS0 3.5 5 mA VVS=24.0V; fCLK=0Hz, digital inputs at +5V or GND 52
IO supply current IVIO 50 100 µA VVS=24.0V; no load on outputs, inputs at VIO or GND 52
Output voltage (VVS, VHS) VHSVS 9.3 10 10.8 V VVS=24.0V; IOUT=0mA, TJ=25°C 52
Output voltage V5VOUT 4.75 5 5.25 V I5VOUT=10mA, TJ=25°C 52
N-channel MOSFET on resistance RONN 63 76 mΩ VVS=VVSX ≥ 12.0V, VBRX=0V; TJ=25°C 53
P-channel MOSFET on resistance RONP 93 110 mΩ VVS=VVSX ≥ 12.0V, VBRX=0V; TJ=25°C 53
N-channel MOSFET on resistance RONN 110 mΩ VVS=VVSX ≥ 12.0V, VBRX=0V; TJ=150°C 53
P-channel MOSFET on resistance RONP 160 mΩ VVS=VVSX ≥ 12.0V, VBRX=0V; TJ=150°C 53
Clock oscillator frequency fCLKOSC 10.8 14.3 17.5 MHz tJ=50°C 53
External clock frequency (operating) fCLK 4 20 MHz typ at 40%/60% duty cycle (printed as 10-16 MHz), max at 50% duty cycle 53
External clock high / low level time tCLK 16 ns 53
External clock transition time tTRCLK 20 ns VINLO to VINHI or back 53
VVS undervoltage threshold high VUV 6.5 7 7.5 V EN_PFD=0 54
VVS undervoltage threshold low VUV 3.25 3.8 4.25 V EN_PFD=1 54
VVCC_IO undervoltage threshold for RESET VUV_VIO 2.1 2.55 3 V VVCC_IO rising (delay typ. 10µs) 54
Short to GND detector threshold (high setting) VBMS2G 1.2 1.7 2.3 V (VVS - VBMx) 54
Short to GND detector threshold (sensitive setting) VBMS2G 0.7 1 1.3 V (VVS - VBMx) 54
Short to VS detector threshold VBMS2VS 1.3 1.5 1.8 V (VBMx) 54
Overtemperature warning tOTPW 85 100 115 °C 54
Overtemperature shutdown hi tOTH 135 150 170 °C temperature rising 54
Sense input peak threshold voltage (low sensitivity) VSRTRIPL 310 323 340 mV VSENSE=0; Cx=248; Hyst.=0 54
Sense input peak threshold voltage (high sensitivity) VSRTRIPH 155 173 190 mV VSENSE=1; Cx=248; Hyst.=0 54
Input leakage current IILEAK -10 10 µA 54
Short to GND detector delay (low-side gate off to short detection) tS2G 2 3.2 4.5 µs TS2G=00 54
Thermal resistance bridge transistor junction to ambient, 4 layer 20cm² PCB RTHA14 80 K/W one bridge chopping, fixed polarity 55
Thermal resistance bridge transistor junction to ambient, 4 layer 20cm² PCB RTHA24 50 K/W two bridges chopping, fixed polarity 55
Thermal resistance bridge transistor junction to ambient, 4 layer 20cm² PCB RTHA44 37 K/W motor running 55
Thermal resistance bridge transistor junction to ambient, 4 layer 50cm² PCB RTHA44a 28 K/W motor running 55

CAD (KiCad official)

  • Symbol: TMC2660C-PA-T
  • Footprint: Package_QFP:PQFP-44_10x10mm_P0.8mm
  • 3D model: PQFP-44 (KiCad packages3D, STEP)
  • 3D model files: tmc2660c-pa-t-etched.step / tmc2660c-pa-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tmc2660c-pa-t.step / tmc2660c-pa-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TRINAMIC Motion Control GmbH datasheet (58 pp, sha256 22f6d50055ccf39c, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF