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TM80P04NF
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Tritech MOS MOSFETs, DFN5x6-8L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TM80P04NF
Tritech MOS · MOSFETs · DFN5x6-8L
TM80P04NF from Tritech MOS, in a DFN5x6-8L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; continuous drain current is -80 A at TC=25°C with VGS=-10V. |
| 2 | S | passive | Source of the P-channel MOSFET, tied to the same source node as pins 1 and 3. |
| 3 | S | passive | Source of the P-channel MOSFET, tied to the same source node as pins 1 and 2. |
| 4 | G | input | Gate; absolute maximum VGS is ±20 V and the threshold VGS(th) is -1 to -2.5 V at ID=-250µA. |
| 5 | D | passive | Drain of the P-channel MOSFET; VDS maximum is -40 V and pulsed drain current is -320 A. |
| 6 | D | passive | Drain of the P-channel MOSFET, tied to the same drain node as pins 5, 7 and 8. |
| 7 | D | passive | Drain of the P-channel MOSFET, tied to the same drain node as pins 5, 6 and 8. |
| 8 | D | passive | Drain of the P-channel MOSFET, tied to the same drain node as pins 5, 6 and 7. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tritech MOS |
| Package | DFN5x6-8L |
| Category | Transistors/Thyristors |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TM80P04NF - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN5x6-8L (KiCad packages3D, STEP)
- 3D model files:
tm80p04nf-etched.step/tm80p04nf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tm80p04nf.step/tm80p04nf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Tritech MOS datasheet (6 pp, sha256
667a8c500dc38394, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TM80P04NF
**Tritech MOS** · MOSFETs · DFN5x6-8L
TM80P04NF from Tritech MOS, in a DFN5x6-8L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; continuous drain current is -80 A at TC=25°C with VGS=-10V. |
| 2 | S | passive | Source of the P-channel MOSFET, tied to the same source node as pins 1 and 3. |
| 3 | S | passive | Source of the P-channel MOSFET, tied to the same source node as pins 1 and 2. |
| 4 | G | input | Gate; absolute maximum VGS is ±20 V and the threshold VGS(th) is -1 to -2.5 V at ID=-250µA. |
| 5 | D | passive | Drain of the P-channel MOSFET; VDS maximum is -40 V and pulsed drain current is -320 A. |
| 6 | D | passive | Drain of the P-channel MOSFET, tied to the same drain node as pins 5, 7 and 8. |
| 7 | D | passive | Drain of the P-channel MOSFET, tied to the same drain node as pins 5, 6 and 8. |
| 8 | D | passive | Drain of the P-channel MOSFET, tied to the same drain node as pins 5, 6 and 7. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tritech MOS |
| Package | DFN5x6-8L |
| Category | Transistors/Thyristors |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `TM80P04NF`
- Footprint: `Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm`
- 3D model: DFN5x6-8L (KiCad packages3D, STEP)
- 3D model files: `tm80p04nf-etched.step` / `tm80p04nf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tm80p04nf.step` / `tm80p04nf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Tritech MOS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602998736117112832) (6 pp, sha256 `667a8c500dc38394`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tm80p04nf-datasheet.pdf)