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Contents

README

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TM7707

TM(Shenzhen Titan Micro Elec) · Analog To Digital Converters (ADCs) · SOIC-16

TM7707 from TM(Shenzhen Titan Micro Elec), in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCLK input Schmitt-logic serial clock input for accessing TM7707 serial data; may be continuous or non-continuous burst clock.
2 MCLK IN input Master clock input from crystal/resonator or CMOS-compatible external clock, 500kHz to 5MHz.
3 MCLK OUT output Crystal/resonator connection to MCLK IN, or inverted clock output that can drive a CMOS load; can be disabled via CLK DIS bit.
4 CS input Active-low chip select logic input; tie low for three-wire interface or use as frame sync.
5 RESET input Active-low reset input that resets control logic, interface logic, calibration coefficients, digital filter and analog modulator to power-on state.
6 AIN2(+) input Positive input of differential analog input channel 2 on TM7707 (channel 1 input on TM7708).
7 AIN1(+) input Positive input of differential analog input channel 1 on TM7707 (channel 2 input on TM7708).
8 AIN1(-) input Negative input of differential analog input channel 1 on TM7707 (COMMON reference input on TM7708).
9 REF IN(+) input Positive differential reference input; must be greater than REF IN(-) and may be any value between VDD and GND.
10 REF IN(-) input Negative differential reference input; may be any value between VDD and GND provided REF IN(+) is greater.
11 AIN2(-) input Negative input of differential analog input channel 2 on TM7707 (channel 3 input on TM7708).
12 DRDY output Active-low logic output indicating a new output word is available in the data register; returns high after a read completes and also indicates calibration completion.
13 DOUT output Serial data output from the on-chip output shift register (communication, clock or data register contents).
14 DIN input Serial data input to the on-chip input shift register, routed to the setup, clock or communication register.
15 VDD power_in Supply voltage, +2.7V to +5.25V.
16 GND power_in Ground reference point for internal circuitry.

Key specifications

Parameter Value
Manufacturer TM(Shenzhen Titan Micro Elec)
Package SOIC-16
Category Data Converters
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD 2.7 5.25 V 2.73.3V or 4.755.25V single supply 3
Operating temperature range -40 85 °C Commercial, B 4
VDD to GND VDD -0.3 7 V TA=+25℃ 4
Analog input voltage to GND -0.3 V -0.3V to VDD+0.3V 4
Reference input voltage to GND -0.3 V -0.3V to VDD+0.3V 4
Digital input voltage to GND -0.3 V -0.3V to VDD+0.3V 4
Digital output voltage to GND -0.3 V -0.3V to VDD+0.3V 4
Storage temperature range -65 150 °C 4
Junction temperature 150 °C 4
Power dissipation (plastic SOIC) 450 mW Plastic SOIC package 4
ESD 4000 V Printed as >4000V 4
Thermal resistance junction-to-ambient (plastic SOIC) θJA 75 °C/W Plastic SOIC package 4
Lead temperature, vapor phase 215 °C Soldering, 60 s (SOIC) 4
Lead temperature, infrared 220 °C Soldering, 15 s (SOIC) 4
Standby current 8 μA Standby (power-down) 1
Maximum power dissipation at 3V 1 mW 3V supply 1
No Missing Codes 16 Bits Guaranteed by Design. Filter Notch < 60 Hz 5
Integral Nonlinearity INL 0.003 % of FSR Filter Notch < 60 Hz. Typically 0.0003% 5
Unipolar Offset Drift 0.5 μV/℃ 5
Bipolar Zero Drift (gains 1, 2, 4) 0.5 μV/℃ For Gains 1, 2 and 4 5
Bipolar Zero Drift (gains 8 to 128) 0.1 μV/℃ For Gains 8, 16, 32, 64 and 128 5
Full-Scale Drift 0.5 μV/℃ 5
Gain Drift 0.5 ppm of FSR/℃ 5
Bipolar Negative Full-Scale Error -0.003 0.003 % of FSR/℃ Typically ±0.001% 5
Bipolar Negative Full-Scale Drift (gains 1 to 4) 1 μV/℃ For Gains of 1 to 4 5
Bipolar Negative Full-Scale Drift (gains 8 to 128) 0.6 μV/℃ For Gains of 8 to 128 5
Input Common-Mode Rejection, Gain=1 CMR 96 dB VDD=5V, Gain=1 5
Input Common-Mode Rejection, Gain=2 CMR 105 dB VDD=5V, Gain=2 5
Input Common-Mode Rejection, Gain=4 CMR 110 dB VDD=5V, Gain=4 5
Input Common-Mode Rejection, Gain=8 CMR 128 130 dB VDD=5V, Gain=8 5
Input Common-Mode Rejection, Gain=1 (3V) CMR 105 dB VDD=3V, Gain=1 5
Input Common-Mode Rejection, Gain=2 (3V) CMR 110 dB VDD=3V, Gain=2 5
Input Common-Mode Rejection, Gain=4 (3V) CMR 120 dB VDD=3V, Gain=4 5

CAD (KiCad official)

  • Symbol: TM7707
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: tm7707-etched.step / tm7707-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tm7707.step / tm7707.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TM(Shenzhen Titan Micro Elec) datasheet (46 pp, sha256 cfd1118ffb627503, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF