# TM7706-TSSOP16

**TM Shenzhen Titan Micro Elec** · Analog To Digital Converters (ADC) · TSSOP-16

TM7706-TSSOP16 from TM Shenzhen Titan Micro Elec, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCLK | input | Read/write serial clock input; the datasheet gives its Schmitt-trigger thresholds (VT+ about 1.4 to 3 V at 5 V and 1 to 2.5 V at 3 V) and a minimum high/low pulse width of 100 ns. |
| 2 | XI | input | Master clock input for a crystal or external clock, with fCLKIN specified from 400 kHz to 2500 kHz. |
| 3 | XO | output | Clock output for the crystal; it is held low when the OSCDIS bit is set to 1 to reduce power. |
| 4 | CSN | input | Active-low chip select that must be pulled low before any register read or write and returned high afterwards (tie to GND for 3-wire operation). |
| 5 | RESET | input | Active-low reset that clears the digital filter, modulator and all registers to their default states, with a minimum pulse width of 100 ns. |
| 6 | AIN1 | input | Differential analog input for channel 1; with BUFEN=0 the absolute/common-mode range is -0.03 V to VDD+0.03 V, and with BUFEN=1 it is 0.05 V to VDD-1.5 V. |
| 7 | AIN2 | input | Differential analog input for channel 2; with BUFEN=0 the absolute/common-mode range is -0.03 V to VDD+0.03 V, and with BUFEN=1 it is 0.05 V to VDD-1.5 V. |
| 8 | COMMON | input | Common reference point for analog channels AIN1, AIN2 and AIN3 that all three channels are measured against. |
| 9 | REF INP | input | Positive input of the differential reference voltage; the datasheet requires REFINP > REFINN, with REFINP-REFINN of about 1.225 V to 1.75 V at 3 V and 2.5 V to 3.5 V at 5 V, and a reference below 1 V raises noise. |
| 10 | REF INN | input | Negative input of the differential reference voltage, normally tied to GND in the application circuit, and must stay below REFINP. |
| 11 | AIN3 | input | Differential analog negative input for channel 3, sharing the same absolute/common-mode limits as the other analog inputs. |
| 12 | OKL | output | Conversion-complete flag that is low when ADC result data is ready to read and high while the ADC is converting or updating. |
| 13 | DOUT | output | Serial data output that shifts out MSB first and is updated on the falling edge of SCLK. |
| 14 | DIN | input | Serial data input that is sampled on the rising edge of SCLK, with data set-up of at least 30 ns and hold of at least 20 ns. |
| 15 | VDD | power_in | Supply voltage of 3 V or 5 V (±5%), with an absolute maximum rating of -0.3 V to 7 V. |
| 16 | GND | power_in | System ground for the device. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TM Shenzhen Titan Micro Elec |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 逻辑电源电压 | VDD | -0.3 |  | 7 | V |  | 9 |
| 模拟输入电压 | Vin | -0.3 |  |  | V |  | 9 |
| 数字输出电压 | Vout | -0.3 |  |  | V |  | 9 |
| 工作温度范围 | Topr | -40 |  | 85 | ℃ |  | 9 |
| 储存温度范围 | Tstg | -65 |  | 150 | ℃ |  | 9 |
| 结温 | Tj |  |  | 150 | ℃ |  | 9 |
| 静电 ESD 人体模式（HBM） |  |  |  | 4000 | V |  | 9 |
| 积分非线性 |  | -0.003 |  | 0.003 | %of FSR |  | 9 |
| 双极性负满标度误差 |  | -0.003 |  | 0.003 | %of FSR/℃ |  | 10 |
| REF IN 绝对/共模电压 |  | 0 |  |  | V |  | 10 |
| AIN 绝对/共模电压 |  | -0.03 |  |  | V | BUFEN=0 | 10 |
| AIN 绝对/共模电压 |  | 0.05 |  |  | V | BUFEN=1 | 10 |
| REFINP, REFINN 差值 |  | 1 |  | 1.75 | V | VDD=3V,Vref=1.225V | 10 |
| REFINP, REFINN 差值 |  | 1 |  | 3.5 | V | VDD=5V,Vref=2.5V | 10 |
| 施密特触发输入 SCLK | VT+ | 1.4 |  | 3 | V | VDD=5V | 10 |
| 施密特触发输入 SCLK | VT_ | 0.8 |  | 1.4 | V | VDD=5V | 10 |
| 施密特触发输入 SCLK | VT+, VT_ | 0.4 |  | 0.8 | V | VDD=5V | 10 |
| 施密特触发输入 SCLK | VT+ | 1 |  | 2.5 | V | VDD=3V | 10 |
| 施密特触发输入 SCLK | VT_ | 0.4 |  | 1.1 | V | VDD=3V | 10 |
| 施密特触发输入 SCLK | VT+, VT_ | 0.375 |  | 0.8 | V | VDD=3V | 10 |

## CAD (KiCad official)

- Symbol: `TM7706-TSSOP16`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `tm7706-tssop16-etched.step` / `tm7706-tssop16-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tm7706-tssop16.step` / `tm7706-tssop16.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TM Shenzhen Titan Micro Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603382927695110144) (15 pp, sha256 `529a5ed0fbe14740`, retrieved 2026-10-20, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tm7706-tssop16-datasheet.pdf)