TM74HC595

{
 "schema": "adom.pads/1",
 "slug": "tm74hc595",
 "footprint": "SOIC-16_3.9x9.9mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -4.445
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c"
 },
 "pad_count": 16,
 "symbol_pins": [
  "1",
  "10",
  "11",
  "12",
  "13",
  "14",
  "15",
  "16",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "QB",
   "type": "tri_state",
   "description": "Parallel tri-state output B (bit 2 of the storage register). Drives up to IO = ±6.0 mA at VDD = 4.5 V (±7.8 mA at 6.0 V). Placed in high-impedance when /OE is high.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "QC",
   "type": "tri_state",
   "description": "Parallel tri-state output C (bit 3 of the storage register). Same drive characteristics as QA-QH. High-impedance when /OE is high.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "QD",
   "type": "tri_state",
   "description": "Parallel tri-state output D (bit 4 of the storage register). Same drive characteristics as QA-QH. High-impedance when /OE is high.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "QE",
   "type": "tri_state",
   "description": "Parallel tri-state output E (bit 5 of the storage register). Same drive characteristics as QA-QH. High-impedance when /OE is high.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "QF",
   "type": "tri_state",
   "description": "Parallel tri-state output F (bit 6 of the storage register). Same drive characteristics as QA-QH. High-impedance when /OE is high.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "QG",
   "type": "tri_state",
   "description": "Parallel tri-state output G (bit 7 of the storage register). Same drive characteristics as QA-QH. High-impedance when /OE is high.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "QH",
   "type": "tri_state",
   "description": "Parallel tri-state output H (bit 8, last stage of the storage register). Same drive characteristics as QA-QH. High-impedance when /OE is high.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "GND",
   "type": "power_in",
   "description": "Ground (negative supply) reference for the device. Connect to system 0 V.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "9",
   "name": "SQH",
   "type": "output",
   "description": "Serial data output - the shifted-out data from the last stage (QH) of the internal shift register. Used to cascade to the SI input of the next TM74HC595 for chains longer than 8 bits. Not tri-stated by /OE.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "10",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "10",
   "name": "SCLR",
   "type": "input",
   "description": "Active-low shift-register clear (/SCLR). Driving this pin low asynchronously resets all stages of the shift register to 0; it does not affect the output storage latches until an RCK rising edge transfers the cleared data.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "11",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "11",
   "name": "SCK",
   "type": "input",
   "description": "Shift-register clock input. Serial data on SI is sampled on the rising edge of SCK and shifted through the internal 8-bit shift register (SPI-compatible). Max frequency > 25 MHz.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "12",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "12",
   "name": "RCK",
   "type": "input",
   "description": "Storage-register (latch) clock input. On the rising edge of RCK, the current contents of the shift register are transferred to the 8-bit output storage latches and appear on QA-QH (subject to /OE).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "13",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "13",
   "name": "OE",
   "type": "input",
   "description": "Active-low output enable (/OE). When low, QA-QH drive the latched storage-register values; when high, QA-QH go to high impedance. Does not affect SQH or the shift-register contents.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "14",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "14",
   "name": "SI",
   "type": "input",
   "description": "Serial data input. Data present on SI is clocked into the first stage of the shift register on the rising edge of SCK. Setup time tsu ≈ 3.0 ns (VDD=5.0 V), hold time th ≈ 2.0 ns.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "15",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "15",
   "name": "QA",
   "type": "tri_state",
   "description": "Parallel tri-state output A (bit 1, first stage of the storage register). Drives up to IO = ±6.0 mA at VDD = 4.5 V (±7.8 mA at 6.0 V). High-impedance when /OE is high.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "16",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "16",
   "name": "VCC",
   "type": "power_in",
   "description": "Positive supply input. Recommended operating range 2.0 V to 5.5 V. Quiescent current Icc ≈ 4 µA (max at 25 °C, 6 V).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}