# TM5880

**TM Shenzhen Titan Micro Elec** · AC-DC Controllers And Regulators · SOT-23-6

TM5880 from TM Shenzhen Titan Micro Elec, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Chip ground reference for the controller; all voltages are specified relative to system ground. |
| 2 | GATE | output | Drives the external power MOSFET with a soft-drive output clamped internally at 16 V (VOH 7.5 V min at 20 mA source, VOL 1 V at 20 mA sink), with GATE voltage rated to 20 V absolute maximum. |
| 3 | CS | input | Samples the primary-side current through an external sense resistor for cycle-by-cycle current limit, with 500 ns leading-edge blanking, and is rated -0.3 V to 7 V. |
| 4 | CC | passive | Connects an external capacitor used for constant-current regulation, referenced to an internal 500 mV (490-510 mV) CC reference; CC voltage is rated -0.3 V to 7 V. |
| 5 | FB | input | Output voltage feedback input with a 2.0 V reference (1.98-2.02 V), output over-voltage threshold 2.4 V, output short/under-voltage threshold 0.65 V, and absolute range -0.7 V to 7 V. |
| 6 | VDD | power_in | Controller supply pin with recommended operating range 10-30 V, UVLO off/on at 9.5 V / 15.5 V typical, over-voltage protection at 33 V typical, and clamp at 35 V typical; absolute maximum 35 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TM Shenzhen Titan Micro Elec |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Chip supply voltage (VDD) |  |  |  | 35 | V |  | 3 |
| Chip VDD clamp current |  |  |  | 10 | mA |  | 3 |
| GATE voltage |  |  |  | 20 | V |  | 3 |
| CC, CS pin voltage range |  | -0.3 |  | 7 | V |  | 3 |
| FB pin voltage range |  | -0.7 |  | 7 | V |  | 3 |
| Storage temperature range |  | -65 |  | 150 | ℃ |  | 3 |
| Maximum junction temperature |  |  |  | 150 | ℃ |  | 3 |
| Operating temperature range (absolute maximum table) |  | -40 |  | 150 | ℃ |  | 3 |
| Soldering temperature (solder) |  |  |  | 260 | ℃ | 10 s | 3 |
| ESD human body model |  |  |  | 3 | KV |  | 3 |
| ESD machine model |  |  |  | 250 | V |  | 3 |
| Chip supply voltage VDD (recommended) | VDD | 10 |  | 30 | V |  | 3 |
| Ambient operating temperature |  | -40 |  | 85 | ℃ |  | 3 |
| Maximum switching frequency |  |  |  | 120 | KHz |  | 3 |
| Startup current | I_Startup |  | 2 | 20 | uA | VDD=UVLO(ON)-1V | 3 |
| Operating current | I_VDD_Op |  | 1 | 1.5 | mA | VFB=1V, CL=0.5nF, VDD=20V | 3 |
| VDD undervoltage lockout (OFF), VDD falling | UVLO(OFF) | 8.5 | 9.5 | 10.5 | V | VDD voltage falling | 3 |
| VDD startup voltage (ON), VDD rising | UVLO(ON) | 14 | 15.5 | 16.5 | V | VDD voltage rising | 3 |
| VDD overvoltage protection threshold | VDD_OVP | 31 | 33 | 35 | V |  | 3 |
| VDD clamp voltage | VDD_Clamp | 33 | 35 | 37 | V | I(VDD)=7mA | 3 |
| Feedback reference voltage | VFB_EA_Ref | 1.98 | 2 | 2.02 | V |  | 3 |
| Internal CC reference voltage | V_CC_ref | 490 | 500 | 510 | mV |  | 3 |
| Output overvoltage protection threshold | VFB_OVP |  | 2.4 |  | V |  | 3 |
| Output short-circuit threshold | VFB_Short |  | 0.65 |  | V |  | 3 |
| Output short-circuit clamp frequency | FClamp_Short |  | 40 |  | KHz |  | 3 |
| Demagnetization comparator threshold | VFB_DEM |  | 75 |  | mV |  | 3 |
| Minimum off time | Tmin_OFF |  | 2 |  | uSec |  | 3 |
| Maximum off time | Tmax_OFF |  | 3 |  | mSec |  | 3 |
| Maximum cable compensation current | ICable_max |  | 40 |  | uA |  | 3 |
| CS leading-edge blanking time | T-blanking |  | 500 |  | nSec |  | 3 |
| Chip turn-off delay | TD_OC |  | 100 |  | nSec | CL=1nF at GATE | 3 |
| GATE output low level | VOL |  | 1 |  | V | Io=20mA (sink) | 4 |
| GATE output high level | VOH |  | 7.5 |  | V | Io=20mA (source) | 4 |
| GATE output clamp voltage | VG_Clamp |  | 16 |  | V | VDD=24V | 4 |
| GATE output rise time | T_r |  | 700 |  | nSec | CL=0.5nF | 4 |
| GATE output fall time | T_f |  | 35 |  | nSec | CL=0.5nF | 4 |
| Package thermal resistance (labelled SOT-26 in datasheet) |  |  | 250 |  | ℃/W |  | 3 |

## CAD (KiCad official)

- Symbol: `TM5880`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `tm5880-etched.step` / `tm5880-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tm5880.step` / `tm5880.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TM Shenzhen Titan Micro Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590440721506603008) (10 pp, sha256 `b3695ea1fe14766c`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tm5880-datasheet.pdf)