component
TM4C1230D5PMIR
Public Made by Adomby adom
Texas Instruments Pre-ordered Chips, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "tm4c1230d5pmir",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Pre-ordered Chips, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"interface ics",
"tm4c1230d5pmir",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"tm4c1230d5pmir.kicad_sym",
"tm4c1230d5pmir.kicad_mod",
"tm4c1230d5pmir.glb",
"tm4c1230d5pmir.step",
"tm4c1230d5pmir.lbr",
"docs/hero.png",
"docs/tm4c1230d5pmir-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"tm4c1230d5pmir-hero.glb",
"tm4c1230d5pmir-hero.overlay.json",
"tm4c1230d5pmir-etched.glb"
],
"component": {
"mpn": "TM4C1230D5PMIR",
"manufacturer": "Texas Instruments",
"package": "LQFP-64(10x10)",
"pin_count": 64,
"category": "Interface ICs",
"subcategory": "Pre-ordered Chips",
"datasheet": "https://www.ti.com/lit/ds/symlink/tm4c1230d5pm.pdf",
"parts": {
"symbol": "tm4c1230d5pmir.kicad_sym",
"footprint": "tm4c1230d5pmir.kicad_mod",
"model_3d": "tm4c1230d5pmir-hero.glb",
"model_3d_plain": "tm4c1230d5pmir-etched.glb",
"model_3d_step": "tm4c1230d5pmir-etched.step",
"model_3d_step_plain": "tm4c1230d5pmir.step",
"lbr": "tm4c1230d5pmir.lbr"
},
"distributor_links": {
"lcsc": "C544881",
"digikey": "296-TM4C1230D5PMIRTR-ND",
"mouser": "595-TM4C1230D5PMIR"
},
"distributor_check": {
"checked_at": "2026-11-02T17:30:56Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-TM4C1230D5PMIRTR-ND",
"status": "found"
},
"mouser": {
"pn": "595-TM4C1230D5PMIR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "PB6",
"type": "bidirectional",
"description": "GPIO port B bit 6, TTL-compatible, with alternate functions I2C5SCL (open-drain, active pull-up), SSI2Rx and T0CCP0."
},
{
"number": "2",
"name": "VDDA",
"type": "power_in",
"description": "Positive supply for the analog circuits (ADC, analog comparators); must meet the voltage specification in Table 20-5 regardless of system implementation."
},
{
"number": "3",
"name": "GNDA",
"type": "power_in",
"description": "Ground reference for the analog circuits (ADC, analog comparators), separated from GND to reduce noise coupling."
},
{
"number": "4",
"name": "PB7",
"type": "bidirectional",
"description": "GPIO port B bit 7, TTL-compatible, with alternate functions I2C5SDA (open-drain), SSI2Tx and T0CCP1."
},
{
"number": "5",
"name": "PF4",
"type": "bidirectional",
"description": "GPIO port F bit 4, TTL-compatible, with alternate function T2CCP0 (16/32-bit timer 2 capture/compare/PWM 0)."
},
{
"number": "6",
"name": "PE3",
"type": "bidirectional",
"description": "GPIO port E bit 3, with analog alternate function AIN0 (ADC input 0); configure DEN=0 and AMSEL=1 for analog use."
},
{
"number": "7",
"name": "PE2",
"type": "bidirectional",
"description": "GPIO port E bit 2, with analog alternate function AIN1 (ADC input 1); configure DEN=0 and AMSEL=1 for analog use."
},
{
"number": "8",
"name": "PE1",
"type": "bidirectional",
"description": "GPIO port E bit 1, with analog alternate function AIN2 (ADC input 2) and UART7 transmit U7Tx."
},
{
"number": "9",
"name": "PE0",
"type": "bidirectional",
"description": "GPIO port E bit 0, with analog alternate function AIN3 (ADC input 3) and UART7 receive U7Rx."
},
{
"number": "10",
"name": "PD7",
"type": "bidirectional",
"description": "GPIO port D bit 7, TTL-compatible, with alternate functions NMI (non-maskable interrupt), U2Tx and WT5CCP1; locked by commit control."
},
{
"number": "11",
"name": "VDD",
"type": "power_in",
"description": "Positive supply for I/O and some logic; voltage limits are given in Table 20-5."
},
{
"number": "12",
"name": "GND",
"type": "power_in",
"description": "Ground reference for logic and I/O pins."
},
{
"number": "13",
"name": "PC7",
"type": "bidirectional",
"description": "GPIO port C bit 7, TTL-compatible, with alternate functions C0- (analog comparator 0 negative input), U3Tx and WT1CCP1."
},
{
"number": "14",
"name": "PC6",
"type": "bidirectional",
"description": "GPIO port C bit 6, TTL-compatible, with alternate functions C0+ (analog comparator 0 positive input), U3Rx and WT1CCP0."
},
{
"number": "15",
"name": "PC5",
"type": "bidirectional",
"description": "GPIO port C bit 5, TTL-compatible, with alternate functions C1+ (analog comparator 1 positive input), U1CTS, U1Tx, U4Tx and WT0CCP1."
},
{
"number": "16",
"name": "PC4",
"type": "bidirectional",
"description": "GPIO port C bit 4, TTL-compatible, with alternate functions C1- (analog comparator 1 negative input), U1RTS, U1Rx, U4Rx and WT0CCP0."
},
{
"number": "17",
"name": "PA0",
"type": "bidirectional",
"description": "GPIO port A bit 0, TTL-compatible, with alternate function U0Rx (UART0 receive), default UART function at reset."
},
{
"number": "18",
"name": "PA1",
"type": "bidirectional",
"description": "GPIO port A bit 1, TTL-compatible, with alternate function U0Tx (UART0 transmit), default UART function at reset."
},
{
"number": "19",
"name": "PA2",
"type": "bidirectional",
"description": "GPIO port A bit 2, TTL-compatible, with alternate function SSI0Clk (SSI module 0 clock), default SSI function at reset."
},
{
"number": "20",
"name": "PA3",
"type": "bidirectional",
"description": "GPIO port A bit 3, TTL-compatible, with alternate function SSI0Fss (SSI module 0 frame signal), default SSI function at reset."
},
{
"number": "21",
"name": "PA4",
"type": "bidirectional",
"description": "GPIO port A bit 4, TTL-compatible, with alternate function SSI0Rx (SSI module 0 receive), default SSI function at reset."
},
{
"number": "22",
"name": "PA5",
"type": "bidirectional",
"description": "GPIO port A bit 5, TTL-compatible, with alternate function SSI0Tx (SSI module 0 transmit), default SSI function at reset."
},
{
"number": "23",
"name": "PA6",
"type": "bidirectional",
"description": "GPIO port A bit 6, with alternate function I2C1SCL (open-drain, active pull-up on the clock signal)."
},
{
"number": "24",
"name": "PA7",
"type": "bidirectional",
"description": "GPIO port A bit 7, with alternate function I2C1SDA (open-drain data)."
},
{
"number": "25",
"name": "VDDC",
"type": "power_out",
"description": "Output of the on-chip LDO supplying the 1.2 V core logic; connect only to the other VDDC pins and the external capacitor specified in Table 20-12."
},
{
"number": "26",
"name": "VDD",
"type": "power_in",
"description": "Positive supply for I/O and some logic; voltage limits are given in Table 20-5."
},
{
"number": "27",
"name": "GND",
"type": "power_in",
"description": "Ground reference for logic and I/O pins."
},
{
"number": "28",
"name": "PF0",
"type": "bidirectional",
"description": "GPIO port F bit 0, TTL-compatible, with alternate functions C0o, CAN0Rx, NMI, SSI1Rx, T0CCP0 and U1RTS; locked by commit control."
},
{
"number": "29",
"name": "PF1",
"type": "bidirectional",
"description": "GPIO port F bit 1, TTL-compatible, with alternate functions C1o, SSI1Tx, T0CCP1, TRD1 and U1CTS."
},
{
"number": "30",
"name": "PF2",
"type": "bidirectional",
"description": "GPIO port F bit 2, TTL-compatible, with alternate functions SSI1Clk, T1CCP0 and TRD0."
},
{
"number": "31",
"name": "PF3",
"type": "bidirectional",
"description": "GPIO port F bit 3, TTL-compatible, with alternate functions CAN0Tx, SSI1Fss, T1CCP1 and TRCLK."
},
{
"number": "32",
"name": "PG5",
"type": "bidirectional",
"description": "GPIO port G bit 5, TTL-compatible, with alternate functions I2C1SDA (open-drain), U2Tx and WT0CCP1."
},
{
"number": "33",
"name": "PG4",
"type": "bidirectional",
"description": "GPIO port G bit 4, TTL-compatible, with alternate functions I2C1SCL (open-drain, active pull-up), U2Rx and WT0CCP0."
},
{
"number": "34",
"name": "PG3",
"type": "bidirectional",
"description": "GPIO port G bit 3, TTL-compatible, with alternate functions I2C4SDA (open-drain) and T5CCP1."
},
{
"number": "35",
"name": "PG2",
"type": "bidirectional",
"description": "GPIO port G bit 2, TTL-compatible, with alternate functions I2C4SCL (open-drain, active pull-up) and T5CCP0."
},
{
"number": "36",
"name": "PG1",
"type": "bidirectional",
"description": "GPIO port G bit 1, TTL-compatible, with alternate functions I2C3SDA (open-drain) and T4CCP1."
},
{
"number": "37",
"name": "PG0",
"type": "bidirectional",
"description": "GPIO port G bit 0, TTL-compatible, with alternate functions I2C3SCL (open-drain, active pull-up) and T4CCP0."
},
{
"number": "38",
"name": "RST",
"type": "input",
"description": "System reset input, TTL-compatible; asserting it resets the device."
},
{
"number": "39",
"name": "GND",
"type": "power_in",
"description": "Ground reference for logic and I/O pins."
},
{
"number": "40",
"name": "OSC0",
"type": "input",
"description": "Main oscillator crystal input or an external clock reference input (analog)."
},
{
"number": "41",
"name": "OSC1",
"type": "output",
"description": "Main oscillator crystal output; leave unconnected when using a single-ended clock source."
},
{
"number": "42",
"name": "VDD",
"type": "power_in",
"description": "Positive supply for I/O and some logic; voltage limits are given in Table 20-5."
},
{
"number": "43",
"name": "PD4",
"type": "bidirectional",
"description": "GPIO port D bit 4, TTL-compatible but not 5-V tolerant, with alternate functions U6Rx and WT4CCP0."
},
{
"number": "44",
"name": "PD5",
"type": "bidirectional",
"description": "GPIO port D bit 5, TTL-compatible but not 5-V tolerant, with alternate functions U6Tx and WT4CCP1."
},
{
"number": "45",
"name": "PB0",
"type": "bidirectional",
"description": "GPIO port B bit 0, TTL-compatible but not 5-V tolerant, with alternate functions T2CCP0 and U1Rx."
},
{
"number": "46",
"name": "PB1",
"type": "bidirectional",
"description": "GPIO port B bit 1, TTL-compatible but not 5-V tolerant, with alternate functions T2CCP1 and U1Tx."
},
{
"number": "47",
"name": "PB2",
"type": "bidirectional",
"description": "GPIO port B bit 2, with alternate functions I2C0SCL (open-drain, active pull-up) and T3CCP0."
},
{
"number": "48",
"name": "PB3",
"type": "bidirectional",
"description": "GPIO port B bit 3, with alternate functions I2C0SDA (open-drain) and T3CCP1."
},
{
"number": "49",
"name": "PC3",
"type": "bidirectional",
"description": "GPIO port C bit 3, TTL-compatible, with alternate functions SWO/TDO (JTAG trace output), and T5CCP1."
},
{
"number": "50",
"name": "PC2",
"type": "bidirectional",
"description": "GPIO port C bit 2, TTL-compatible, with alternate functions TDI (JTAG test data input) and T5CCP0."
},
{
"number": "51",
"name": "PC1",
"type": "bidirectional",
"description": "GPIO port C bit 1, TTL-compatible, with alternate functions SWDIO/TMS (JTAG/SWD mode select) and T4CCP1."
},
{
"number": "52",
"name": "PC0",
"type": "bidirectional",
"description": "GPIO port C bit 0, TTL-compatible, with alternate functions SWCLK/TCK (JTAG/SWD clock) and T4CCP0."
},
{
"number": "53",
"name": "PD6",
"type": "bidirectional",
"description": "GPIO port D bit 6, TTL-compatible, with alternate functions U2Rx and WT5CCP0."
},
{
"number": "54",
"name": "VDD",
"type": "power_in",
"description": "Positive supply for I/O and some logic; voltage limits are given in Table 20-5."
},
{
"number": "55",
"name": "GND",
"type": "power_in",
"description": "Ground reference for logic and I/O pins."
},
{
"number": "56",
"name": "VDDC",
"type": "power_out",
"description": "Output of the on-chip LDO supplying the 1.2 V core logic; connect only to the other VDDC pins and the external capacitor specified in Table 20-12."
},
{
"number": "57",
"name": "PB5",
"type": "bidirectional",
"description": "GPIO port B bit 5, with analog alternate function AIN11 and alternate functions CAN0Tx, SSI2Fss and T1CCP1."
},
{
"number": "58",
"name": "PB4",
"type": "bidirectional",
"description": "GPIO port B bit 4, with analog alternate function AIN10 and alternate functions CAN0Rx, SSI2Clk and T1CCP0."
},
{
"number": "59",
"name": "PE4",
"type": "bidirectional",
"description": "GPIO port E bit 4, with analog alternate function AIN9 and alternate functions CAN0Rx, I2C2SCL (open-drain) and U5Rx."
},
{
"number": "60",
"name": "PE5",
"type": "bidirectional",
"description": "GPIO port E bit 5, with analog alternate function AIN8 and alternate functions CAN0Tx, I2C2SDA (open-drain) and U5Tx."
},
{
"number": "61",
"name": "PD0",
"type": "bidirectional",
"description": "GPIO port D bit 0, with analog alternate function AIN7 and alternate functions I2C3SCL (open-drain), SSI1Clk, SSI3Clk and WT2CCP0."
},
{
"number": "62",
"name": "PD1",
"type": "bidirectional",
"description": "GPIO port D bit 1, with analog alternate function AIN6 and alternate functions I2C3SDA (open-drain), SSI1Fss, SSI3Fss and WT2CCP1."
},
{
"number": "63",
"name": "PD2",
"type": "bidirectional",
"description": "GPIO port D bit 2, with analog alternate function AIN5 and alternate functions SSI1Rx, SSI3Rx and WT3CCP0."
},
{
"number": "64",
"name": "PD3",
"type": "bidirectional",
"description": "GPIO port D bit 3, with analog alternate function AIN4 and alternate functions SSI1Tx, SSI3Tx and WT3CCP1."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package variant TM4C1230D5PMIR is listed in the Package Option Addendum as 64-pin LQFP (PM), matchin",
"1/64 pins cited to the wrong page (name found elsewhere): ['41:OSC1@p1036']"
],
"pages_sent": 97,
"cost_usd": 0.1278,
"at": "2026-11-02T17:30:40"
},
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/tm4c1230d5pm.pdf",
"pages": 1107,
"sha256": "cf04f83060650d46",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 64,
"described": 64,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "tm4c1230d5pmir.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12.0,
12.0,
1.5
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",
"checked": "2026-11-02",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "tm4c1230d5pmir-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12.0,
12.0,
1.5
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "c959b4135615aecca665754b2a3bfa038dac228d91f49da9963ac039422b2e90",
"checked": "2026-11-02",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}