# TM02P02I

**Tritech MOS** · MOSFETs · SOT-23

TM02P02I from Tritech MOS, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; controls the channel, with an absolute maximum VGS of ±12 V and a threshold of -0.5 V min to -1.5 V max at ID=-250 µA. |
| 2 | S | passive | Source; the drain current path (continuous ID -2.3 A, pulsed -10 A) and the body diode anode connection. |
| 3 | D | passive | Drain; rated for a drain-source voltage of -20 V and a continuous drain current of -2.3 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Tritech MOS |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -20 |  |  | V | VGS=0V ID=-250μA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | μA | VDS=-20V,VGS=0V | 2 |
| Gate-Body Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±12V,VDS=0V | 2 |
| Gate Threshold Voltage | VGS(th) | -0.5 | -1 | -1.5 | V | VDS=VGS,ID=-250μA | 2 |
| Drain-Source On-State Resistance | RDS(ON) |  | 90 | 102 | mΩ | VGS=-4.5V, ID=-2 A | 2 |
| Drain-Source On-State Resistance | RDS(ON) |  | 103 | 135 | mΩ | VGS=-2.5V, ID=-1.8A | 2 |
| Forward Transconductance | gFS | 4 |  |  | S | VDS=-5V,ID=-2A | 2 |
| Diode Forward Voltage | VSD |  |  | -1.2 | V | VGS=0V,IS=-2A | 2 |
| Drain-Source Voltage | VDS | -20 |  |  | V |  | 1 |
| Gate-Source Voltage | VGS | -12 |  | 12 | V |  | 1 |
| Drain Current-Continuous | ID | -2.3 |  |  | A |  | 1 |
| Drain Current-Pulsed (Note 1) | IDM | -10 |  |  | A |  | 1 |
| Maximum Power Dissipation | PD |  |  | 0.7 | W |  | 1 |
| Operating Junction and Storage Temperature Range | TJ,TSTG | -55 |  | 150 | ℃ |  | 1 |
| Thermal Resistance, Junction-to-Ambient (Note 2) | RθJA |  |  | 178 | ℃/W | Surface Mounted on FR4 Board, t ≤ 10 sec | 1 |

## CAD (KiCad official)

- Symbol: `TM02P02I`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `tm02p02i-etched.step` / `tm02p02i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tm02p02i.step` / `tm02p02i.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Tritech MOS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590906451005698048) (5 pp, sha256 `0d4ed458d7279fac`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tm02p02i-datasheet.pdf)