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TLV9142IDR

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV9142IDR

Texas Instruments · Operational Amplifier · SOIC-8

TLV9142IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 output Output of channel 1, the amplifier output that swings rail-to-rail.
2 IN1- input Inverting input of channel 1.
3 IN1+ input Noninverting input of channel 1.
4 V- power_in Negative (lowest) power supply pin; the supply range is 2.7V to 18V across V+ and V-.
5 IN2+ input Noninverting input of channel 2.
6 IN2- input Inverting input of channel 2.
7 OUT2 output Output of channel 2, the amplifier output that swings rail-to-rail.
8 V+ power_in Positive (highest) power supply pin; the supply range is 2.7V to 18V across V+ and V-.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, VS = (V+), (V-) VS 0 20 V 6
Signal input pins current -10 10 mA 6
Operating ambient temperature TA -55 150 °C 6
Storage temperature Tstg -65 150 °C 6
Junction temperature TJ 150 °C 6
Electrostatic discharge, Human body model (HBM) V(ESD) -2500 2500 V JS-001 6
Electrostatic discharge, Charged device model (CDM) V(ESD) -1500 1500 V JS-002 6
Supply voltage, (V+), (V-) VS 2.7 18 V 6
Specified temperature TA -40 125 °C 6
Input offset voltage VOS -1 0.22 1 mV VCM = V- 8
Input offset voltage VOS -1.5 1.5 mV TA = -40°C to 125°C 8
Input offset voltage versus power supply PSRR -1 0.112 1 µV/V VCM = V-, VS = 5V to 18V TA = -40°C to 125°C 8
Input offset voltage versus power supply PSRR 115 139 dB VCM = V-, VS = 5V to 18V TA = -40°C to 125°C 8
Input offset voltage versus power supply PSRR -1.8 0.1 1.8 µV/V VCM = V-, VS = 2.7V to 18V(1) TA = -40°C to 125°C 8
Input offset voltage versus power supply PSRR 114 140 dB VCM = V-, VS = 2.7V to 18V(1) TA = -40°C to 125°C 8
Input bias current IB -10 0.5 10 pA 8
Input offset current IOS -10 0.5 10 pA 8
Common-mode rejection ratio CMRR 99 108 dB VS = 18V, (V-), 0.1V < VCM < (V+), 2V (Main input pair) 8
Common-mode rejection ratio CMRR 99 dB TA = -40°C to 125°C 8
Common-mode rejection ratio CMRR 86 94 dB VS = 5V, (V-), 0.1V < VCM < (V+), 2V (Main input pair) 8
Common-mode rejection ratio CMRR 85 dB TA = -40°C to 125°C 8
Common-mode rejection ratio CMRR 75 85 dB VS = 2.7V, (V-), 0.1V < VCM < (V+), 2V (Main input pair)(1) 8
Common-mode rejection ratio CMRR 74 dB TA = -40°C to 125°C 8
Common-mode rejection ratio CMRR 80 91 dB VS = 18V, (V-), 0.2V < VCM < (V+) + 0.2V (Both input pairs)(1) 8
Common-mode rejection ratio CMRR 79 dB TA = -40°C to 125°C 8
Open-loop voltage gain AOL 110 135 dB VS = 18V, VCM = V-, (V-) + 0.1V < VO < (V+), 0.1V 9
Open-loop voltage gain AOL 125 dB TA = -40°C to 125°C 9
Open-loop voltage gain AOL 105 130 dB VS = 5V, VCM = V-, (V-) + 0.1V < VO < (V+), 0.1V 9
Open-loop voltage gain AOL 100 120 dB VS = 2.7V, VCM = V-, (V-) + 0.1V < VO < (V+), 0.1V(1) 9
Open-loop voltage gain AOL 115 dB TA = -40°C to 125°C 9
Voltage output swing from rail VOUT 5 10 mV VS = 18V, RL = no load(1) 9
Voltage output swing from rail VOUT 50 60 mV VS = 18V, RL = 10kΩ 9
Voltage output swing from rail VOUT 266 300 mV VS = 18V, RL = 2kΩ 9
Voltage output swing from rail VOUT 1 5 mV VS = 2.7V, RL = no load(1) 9
Voltage output swing from rail VOUT 12 20 mV VS = 2.7V, RL = 10kΩ 9
Voltage output swing from rail VOUT 58 80 mV VS = 2.7V, RL = 2kΩ 9
Short-circuit current ISC -40 40 mA 9
Quiescent current per amplifier IQ 6.6 9 µA VCM = V-, IO = 0A 9
Quiescent current per amplifier IQ 9.5 µA TA = -40°C to 125°C 9
Junction-to-ambient thermal resistance RθJA 129.2 °C/W D (SOIC), 8 pins, dual channel 7
Junction-to-case (top) thermal resistance RθJC(top) 68.2 °C/W D (SOIC), 8 pins, dual channel 7
Junction-to-board thermal resistance RθJB 78.5 °C/W D (SOIC), 8 pins, dual channel 7
Junction-to-top characterization parameter ψJT 17 °C/W D (SOIC), 8 pins, dual channel 7
Junction-to-board characterization parameter ψJB 77.4 °C/W D (SOIC), 8 pins, dual channel 7

CAD (KiCad official)

  • Symbol: TLV9142IDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tlv9142idr-etched.step / tlv9142idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv9142idr.step / tlv9142idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (59 pp, sha256 44236e4cce8ea160, retrieved 2026-10-19, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF