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TLV9064QPWRQ1

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Texas Instruments Operational Amplifier, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV9064QPWRQ1

Texas Instruments · Operational Amplifier · TSSOP-14

TLV9064QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 output Output of channel 1.
2 IN1- input Inverting input of channel 1.
3 IN1+ input Noninverting input of channel 1.
4 V+ power_in Positive (highest) supply; supply voltage V+ - V- is 1.8 V to 5.5 V.
5 IN2+ input Noninverting input of channel 2.
6 IN2- input Inverting input of channel 2.
7 OUT2 output Output of channel 2.
8 OUT3 output Output of channel 3.
9 IN3- input Inverting input of channel 3.
10 IN3+ input Noninverting input of channel 3.
11 V- power_in Negative (lowest) supply or ground for single-supply operation.
12 IN4+ input Noninverting input of channel 4.
13 IN4- input Inverting input of channel 4.
14 OUT4 output Output of channel 4.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Amplifiers
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VOS -1.85 0.3 1.85 mV VS = 5 V 10
Input offset voltage over temperature VOS -2 2 mV VS = 5 V, TA = -40°C to 125°C 10
Power-supply rejection ratio PSRR -80 7 80 µV/V VS = 1.8 V, 5.5 V, VCM = (V-) 10
Common-mode rejection ratio CMRR 80 103 dB VS = 5.5 V, (V-), 0.1 V < VCM < (V+), 1.4 V, TA = -40°C to 125°C 10
Common-mode rejection ratio CMRR 57 75 dB VS = 5.5 V, VCM = -0.1 V to 5.6 V, TA = -40°C to 125°C 10
Input bias current IB -5 5 pA 10
Input offset current IOS -5 5 pA 10
Open-loop voltage gain AOL 100 dB VS = 1.8 V, (V-) + 0.04 V < VO < (V+), 0.04 V, RL = 10 kΩ 10
Open-loop voltage gain AOL 104 130 dB VS = 5.5 V, (V-) + 0.05 V < VO < (V+), 0.05 V, RL = 10 kΩ 10
Quiescent current per amplifier IQ 538 750 µA VS = 5.5 V, IO = 0 mA 11
Quiescent current per amplifier over temperature IQ 800 µA VS = 5.5 V, IO = 0 mA TA = -40°C to 125°C 11
Supply voltage VS 0 6 V (V+), (V-) 8
Signal input pin current -10 10 mA 8
Specified temperature TA -40 125 °C 8
Junction temperature TJ 150 °C 8
Storage temperature Tstg -65 150 °C 8
ESD HBM V(ESD) -4000 4000 V All other packages, per AEC Q100-002 8
ESD CDM V(ESD) -1500 1500 V All other packages, per AEC Q100-011 8
Supply voltage VS 1.8 5.5 V VS = [V+], [V-] 8
Specified temperature TA -40 125 °C 8
Junction-to-ambient thermal resistance RθJA 133.8 °C/W PW (TSSOP) 14 pins 9
Junction-to-case (top) thermal resistance RθJC(top) 62.1 °C/W PW (TSSOP) 14 pins 9
Junction-to-board thermal resistance RθJB 76.9 °C/W PW (TSSOP) 14 pins 9
Junction-to-top characterization parameter ψJT 13.2 °C/W PW (TSSOP) 14 pins 9
Junction-to-board characterization parameter ψJB 76.3 °C/W PW (TSSOP) 14 pins 9
Offset voltage drift dVOS/dT 0.53 µV/°C VS = 5 V, TA = -40°C to 125°C 10
Common-mode rejection ratio CMRR 88 dB VS = 1.8 V, (V-), 0.1 V < VCM < (V+), 1.4 V, TA = -40°C to 125°C 10
Common-mode rejection ratio CMRR 70 dB VS = 1.8 V, VCM = -0.1 V to 1.9 V, TA = -40°C to 125°C 10
Open-loop voltage gain AOL 130 dB VS = 5.5 V, (V-) + 0.15 V < VO < (V+), 0.15 V, RL = 2 kΩ 10
Gain bandwidth product GBP 10 MHz VS = 5 V, G = +1 10
Phase margin φm 55 ° VS = 5 V, G = +1 10
Slew rate SR 6.5 V/µs VS = 5 V, G = +1 10
Voltage output swing from supply rails VO 20 mV VS = 5.5 V, RL = 10 kΩ 10
Voltage output swing from supply rails VO 60 mV VS = 5.5 V, RL = 2 kΩ 10
Short-circuit current ISC 50 mA VS = 5 V 10

CAD (KiCad official)

  • Symbol: TLV9064QPWRQ1
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: tlv9064qpwrq1-etched.step / tlv9064qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv9064qpwrq1.step / tlv9064qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (55 pp, sha256 0e81fa13115ff984, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF