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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tlv9064ipwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json tlv9064ipwr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 21h ago
README.md tlv9064ipwr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 19d ago
tlv9064ipwr-etched.fit.json tlv9064ipwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tlv9064ipwr-etched.glb tlv9064ipwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tlv9064ipwr-etched.step tlv9064ipwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tlv9064ipwr.glb Publish 0.1.0 · Ray 1mo ago
tlv9064ipwr.kicad_mod Publish 0.1.0 · Ray 1mo ago
tlv9064ipwr.kicad_sym Publish 0.1.0 · Ray 1mo ago
tlv9064ipwr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 14 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
tlv9064ipwr.step Publish 0.1.0 · Ray 1mo ago

TLV9064IPWR

Texas Instruments · Operational Amplifier · TSSOP-14

TLV9064IPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of op-amp channel A. Rail-to-rail output; capable of driving up to 100 pF capacitive load directly and higher via an isolation resistor.
2 -IN A input Inverting input of op-amp channel A. Rail-to-rail input; recommended input range (V-) - 0.1 V to (V+) + 0.1 V.
3 +IN A input Non-inverting input of op-amp channel A. Rail-to-rail input; recommended input range (V-) - 0.1 V to (V+) + 0.1 V.
4 V+ power_in Positive (highest) supply rail. Single-supply operation 1.8 V to 5.5 V (absolute maximum 6 V).
5 +IN B input Non-inverting input of op-amp channel B. Rail-to-rail input; recommended input range (V-) - 0.1 V to (V+) + 0.1 V.
6 -IN B input Inverting input of op-amp channel B. Rail-to-rail input; recommended input range (V-) - 0.1 V to (V+) + 0.1 V.
7 OUT B output Output of op-amp channel B. Rail-to-rail output.
8 OUT C output Output of op-amp channel C. Rail-to-rail output.
9 -IN C input Inverting input of op-amp channel C. Rail-to-rail input; recommended input range (V-) - 0.1 V to (V+) + 0.1 V.
10 +IN C input Non-inverting input of op-amp channel C. Rail-to-rail input; recommended input range (V-) - 0.1 V to (V+) + 0.1 V.
11 V- power_in Negative (lowest) supply rail or ground for single-supply operation.
12 +IN D input Non-inverting input of op-amp channel D. Rail-to-rail input; recommended input range (V-) - 0.1 V to (V+) + 0.1 V.
13 -IN D input Inverting input of op-amp channel D. Rail-to-rail input; recommended input range (V-) - 0.1 V to (V+) + 0.1 V.
14 OUT D output Output of op-amp channel D. Rail-to-rail output.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Op-amp/Cmp
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • TLV9064IPWR
  • TLV9064IPWRID
  • TLV9064IPWRIDR
  • TLV9064IPWRIRTE
  • TLV9064IPWRIRTER
  • TLV9064IPWRIRUC
  • TLV9064IPWRIRUCR

CAD (KiCad official)

  • Symbol: TLV9064IPWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: tlv9064ipwr-etched.step / tlv9064ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv9064ipwr.step / tlv9064ipwr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tlv9064ipwr.step 194 KB You want the bare part, or you mark your own boards.
tlv9064ipwr-etched.step 2.3 MB You want the part with TLV9064IPWR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 597 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (81 pp, sha256 e444d0490c93b236, retrieved 2026-08-17, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF