component
TLV9062QDRQ1
Public Made by Adomby adom
Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLV9062QDRQ1
Texas Instruments · Operational Amplifier · SOIC-8
TLV9062QDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Channel 1 amplifier output, a class-AB rail-to-rail stage that swings to within about 15 mV of each supply rail with a 10 kΩ load. |
| 2 | IN1- | input | Channel 1 inverting input, which must stay within the recommended input voltage range of (V-) - 0.1 V to (V+) + 0.1 V. |
| 3 | IN1+ | input | Channel 1 non-inverting input, which must stay within the recommended input voltage range of (V-) - 0.1 V to (V+) + 0.1 V. |
| 4 | V- | power_in | Negative (lowest) power supply, or ground for single-supply operation; total supply (V+) - (V-) must be 1.8 V to 5.5 V. |
| 5 | IN2+ | input | Channel 2 non-inverting input, which must stay within the recommended input voltage range of (V-) - 0.1 V to (V+) + 0.1 V. |
| 6 | IN2- | input | Channel 2 inverting input, which must stay within the recommended input voltage range of (V-) - 0.1 V to (V+) + 0.1 V. |
| 7 | OUT2 | output | Channel 2 amplifier output, a class-AB rail-to-rail stage that swings to within about 15 mV of each supply rail with a 10 kΩ load. |
| 8 | V+ | power_in | Positive (highest) power supply; total supply (V+) - (V-) must be 1.8 V to 5.5 V and must not exceed the 6 V absolute maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -1.85 | 0.3 | 1.85 | mV | VS = 5V | 10 |
| Input offset voltage over temperature | VOS | -2 | 2 | mV | VS = 5V, TA = -40°C to 125°C | 10 | |
| Power supply rejection ratio | PSRR | -80 | 7 | 80 | µV/V | VS = 1.8V, 5.5V, VCM = (V-) | 10 |
| Common-mode rejection ratio | CMRR | 80 | 103 | dB | VS = 5.5V, (V-), 0.1V < VCM < (V+), 1.4V, TA = -40°C to 125°C | 10 | |
| Common-mode rejection ratio | CMRR | 57 | 75 | dB | VS = 5.5V, VCM = -0.1V to 5.6V, TA = -40°C to 125°C | 10 | |
| Common-mode rejection ratio | CMRR | 88 | dB | VS = 1.8V, (V-), 0.1V < VCM < (V+), 1.4V, TA = -40°C to 125°C | 10 | ||
| Common-mode rejection ratio | CMRR | 70 | dB | VS = 1.8V, VCM = -0.1V to 1.9V, TA = -40°C to 125°C | 10 | ||
| Open-loop voltage gain | AOL | 100 | dB | VS = 1.8V, (V-) + 0.04V < VO < (V+), 0.04V, RL = 10kΩ | 10 | ||
| Open-loop voltage gain | AOL | 104 | 130 | dB | VS = 5.5V, (V-) + 0.05V < VO < (V+), 0.05V, RL = 10kΩ | 10 | |
| Output voltage swing from supply rail | VO | 20 | mV | VS = 5.5V, RL = 10kΩ | 11 | ||
| Output voltage swing from supply rail | VO | 60 | mV | VS = 5.5V, RL = 2kΩ | 11 | ||
| Short-circuit current | ISC | -50 | 50 | mA | VS = 5V | 11 | |
| Quiescent current per amplifier | IQ | 538 | 750 | µA | VS = 5.5V, IO = 0mA | 11 | |
| Quiescent current per amplifier over temperature | IQ | 800 | µA | VS = 5.5V, IO = 0mA, TA = -40°C to 125°C | 11 | ||
| Junction-to-ambient thermal resistance (D, SOIC-8) | RθJA | 152 | °C/W | 9 | |||
| Junction-to-case (top) thermal resistance (D, SOIC-8) | RθJC(top) | 92.1 | °C/W | 9 | |||
| Junction-to-board thermal resistance (D, SOIC-8) | RθJB | 95.6 | °C/W | 9 |
CAD (KiCad official)
- Symbol:
TLV9062QDRQ1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tlv9062qdrq1-etched.step/tlv9062qdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv9062qdrq1.step/tlv9062qdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (55 pp, sha256
668b650594bcfe91, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLV9062QDRQ1
**Texas Instruments** · Operational Amplifier · SOIC-8
TLV9062QDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Channel 1 amplifier output, a class-AB rail-to-rail stage that swings to within about 15 mV of each supply rail with a 10 kΩ load. |
| 2 | IN1- | input | Channel 1 inverting input, which must stay within the recommended input voltage range of (V-) - 0.1 V to (V+) + 0.1 V. |
| 3 | IN1+ | input | Channel 1 non-inverting input, which must stay within the recommended input voltage range of (V-) - 0.1 V to (V+) + 0.1 V. |
| 4 | V- | power_in | Negative (lowest) power supply, or ground for single-supply operation; total supply (V+) - (V-) must be 1.8 V to 5.5 V. |
| 5 | IN2+ | input | Channel 2 non-inverting input, which must stay within the recommended input voltage range of (V-) - 0.1 V to (V+) + 0.1 V. |
| 6 | IN2- | input | Channel 2 inverting input, which must stay within the recommended input voltage range of (V-) - 0.1 V to (V+) + 0.1 V. |
| 7 | OUT2 | output | Channel 2 amplifier output, a class-AB rail-to-rail stage that swings to within about 15 mV of each supply rail with a 10 kΩ load. |
| 8 | V+ | power_in | Positive (highest) power supply; total supply (V+) - (V-) must be 1.8 V to 5.5 V and must not exceed the 6 V absolute maximum. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -1.85 | 0.3 | 1.85 | mV | VS = 5V | 10 |
| Input offset voltage over temperature | VOS | -2 | | 2 | mV | VS = 5V, TA = -40°C to 125°C | 10 |
| Power supply rejection ratio | PSRR | -80 | 7 | 80 | µV/V | VS = 1.8V, 5.5V, VCM = (V-) | 10 |
| Common-mode rejection ratio | CMRR | 80 | 103 | | dB | VS = 5.5V, (V-), 0.1V < VCM < (V+), 1.4V, TA = -40°C to 125°C | 10 |
| Common-mode rejection ratio | CMRR | 57 | 75 | | dB | VS = 5.5V, VCM = -0.1V to 5.6V, TA = -40°C to 125°C | 10 |
| Common-mode rejection ratio | CMRR | 88 | | | dB | VS = 1.8V, (V-), 0.1V < VCM < (V+), 1.4V, TA = -40°C to 125°C | 10 |
| Common-mode rejection ratio | CMRR | 70 | | | dB | VS = 1.8V, VCM = -0.1V to 1.9V, TA = -40°C to 125°C | 10 |
| Open-loop voltage gain | AOL | 100 | | | dB | VS = 1.8V, (V-) + 0.04V < VO < (V+), 0.04V, RL = 10kΩ | 10 |
| Open-loop voltage gain | AOL | 104 | 130 | | dB | VS = 5.5V, (V-) + 0.05V < VO < (V+), 0.05V, RL = 10kΩ | 10 |
| Output voltage swing from supply rail | VO | | | 20 | mV | VS = 5.5V, RL = 10kΩ | 11 |
| Output voltage swing from supply rail | VO | | | 60 | mV | VS = 5.5V, RL = 2kΩ | 11 |
| Short-circuit current | ISC | -50 | | 50 | mA | VS = 5V | 11 |
| Quiescent current per amplifier | IQ | | 538 | 750 | µA | VS = 5.5V, IO = 0mA | 11 |
| Quiescent current per amplifier over temperature | IQ | | | 800 | µA | VS = 5.5V, IO = 0mA, TA = -40°C to 125°C | 11 |
| Junction-to-ambient thermal resistance (D, SOIC-8) | RθJA | | 152 | | °C/W | | 9 |
| Junction-to-case (top) thermal resistance (D, SOIC-8) | RθJC(top) | | 92.1 | | °C/W | | 9 |
| Junction-to-board thermal resistance (D, SOIC-8) | RθJB | | 95.6 | | °C/W | | 9 |
## CAD (KiCad official)
- Symbol: `TLV9062QDRQ1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tlv9062qdrq1-etched.step` / `tlv9062qdrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv9062qdrq1.step` / `tlv9062qdrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv9062-q1) (55 pp, sha256 `668b650594bcfe91`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tlv9062qdrq1-datasheet.pdf)