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TLV9054IRTER

Texas Instruments · Operational Amplifier · WQFN-16-EP(3x3)

TLV9054IRTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1+ input Noninverting input, channel 1. Rail-to-rail input; usable common-mode range extends from V- to V+.
2 V+ power_in Positive (high) supply. Recommended 1.8 V to 6.0 V referenced to V-; absolute maximum 7 V across supplies. Bypass locally with ceramic capacitor.
3 IN2+ input Noninverting input, channel 2. Rail-to-rail input; usable common-mode range extends from V- to V+.
4 IN2- input Inverting input, channel 2. Rail-to-rail input.
5 OUT2 output Op-amp output, channel 2. Rail-to-rail output; capable of driving up to 150 pF capacitive load in unity gain.
6 NC unconnected No internal connection. May be left floating or tied to any potential.
7 NC unconnected No internal connection. May be left floating or tied to any potential.
8 OUT3 output Op-amp output, channel 3. Rail-to-rail output.
9 IN3- input Inverting input, channel 3. Rail-to-rail input.
10 IN3+ input Noninverting input, channel 3. Rail-to-rail input.
11 V- power_in Negative (low) supply or ground for single-supply operation. Exposed thermal pad must be connected to V-.
12 IN4+ input Noninverting input, channel 4. Rail-to-rail input.
13 IN4- input Inverting input, channel 4. Rail-to-rail input.
14 OUT4 output Op-amp output, channel 4. Rail-to-rail output.
15 OUT1 output Op-amp output, channel 1. Rail-to-rail output.
16 IN1- input Inverting input, channel 1. Rail-to-rail input.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16-EP(3x3)
Category Op-amp/Cmp
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • TLV9054IRTER
  • TLV9054IRTET
  • TLV9054IRTERID
  • TLV9054IRTERIDR
  • TLV9054IRTERIPW
  • TLV9054IRTERIPWR
  • TLV9054IRTERIRUC
  • TLV9054IRTERIRUCR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, VS = (V+) – (V–) VS 1.8 6 V Over operating junction temperature range 11
Specified temperature -40 125 °C 11
Supply voltage (absolute maximum) 7 V 11
Input current (per input pin) -10 10 mA 11
Rated ambient temperature, TA TA -40 125 °C 11
Junction temperature, TJ TJ 150 °C 11
Storage temperature, Tstg Tstg -65 150 °C 11
Junction-to-ambient thermal resistance (RTE) RθJA 65.5 °C/W Quad channel, RTE (WQFN) package 12
Junction-to-case (top) thermal resistance (RTE) RθJC(top) 70.6 °C/W Quad channel, RTE (WQFN) package 12
Junction-to-board thermal resistance (RTE) RθJB 40.5 °C/W Quad channel, RTE (WQFN) package 12
Junction-to-top characterization parameter (RTE) ψJT 5.8 °C/W Quad channel, RTE (WQFN) package 12
Junction-to-board characterization parameter (RTE) ψJB 40.5 °C/W Quad channel, RTE (WQFN) package 12
Junction-to-case (bottom) thermal resistance (RTE) RθJC(bot) 24.5 °C/W Quad channel, RTE (WQFN) package 12
Input offset voltage VOS -1.6 0.33 1.6 mV VS = 5 V 13
Input offset voltage over temperature VOS -2 2 mV VS = 5 V, TA = –40°C to +125°C 13
Input offset voltage drift dVOS/dT -0.5 0.5 µV/°C VS = 5 V, TA = –40°C to +125°C 13
Power-supply rejection ratio PSRR -80 13 80 µV/V VS = 1.8 V – 5.5 V, VCM = (V–) 13
Common-mode rejection ratio CMRR 80 96 dB VS = 5.5 V, (V–) – 0.1 V < VCM < (V+) – 1.4 V, TA = –40°C to +125°C 13
Common-mode rejection ratio CMRR 62 79 dB VS = 5.5 V, VCM = -0.1 V to 5.6 V, TA = -40°C to +125°C 13
Common-mode rejection ratio CMRR 88 dB VS = 1.8 V, (V–) – 0.1 V < VCM < (V+) – 1.4 V, TA = –40°C to +125°C 13
Common-mode rejection ratio CMRR 72 dB VS = 1.8 V, VCM = -0.1 V to 1.9 V, TA = -40°C to +125°C 13
Input bias current IB -18 2 18 pA 13
Input bias current over temperature IB -525 525 pA TA = –40°C to +125°C 13
Input offset current IOS -15 1 15 pA 13
Input offset current over temperature IOS -440 440 pA TA = –40°C to +125°C 13
Open-loop voltage gain AOL 104 128 dB VS = 5.5 V, (V–) + 0.05 V < VO < (V+) – 0.05 V, RL = 10 kΩ 13
Open-loop voltage gain AOL 106 dB VS = 1.8 V, (V–) + 0.04 V < VO < (V+) – 0.04 V, RL = 10 kΩ 13
Open-loop voltage gain AOL 108 dB VS = 1.8 V, (V–) + 0.06 V < VO < (V+) – 0.06 V, RL = 2 kΩ 13
Open-loop voltage gain AOL 130 dB VS = 5.5 V, (V–) + 0.15 V < VO < (V+) – 0.15 V, RL = 2 kΩ 13
Output voltage swing from supply rail VO 16 mV VS = 5.5 V, RL = 10 kΩ 14
Output voltage swing from supply rail VO 40 mV VS = 5.5 V, RL = 2 kΩ 14
Short-circuit current ISC -50 50 mA VS = 5 V 14
Quiescent current per amplifier IQ 330 450 µA VS = 5.5 V, IO = 0 mA 14
Quiescent current per amplifier over temperature IQ 475 µA VS = 5.5 V, IO = 0 mA, TA = -40°C to +125°C 14

CAD (KiCad official)

  • Symbol: TLV9054IRTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tlv9054irter-etched.step / tlv9054irter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv9054irter.step / tlv9054irter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (81 pp, sha256 51ee3f0fd16ed967, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF