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TLV9024PWR
Public Made by Adomby adom
Texas Instruments Comparators, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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README
markdownTLV9024PWR
Texas Instruments · Comparators · TSSOP-14
TLV9024PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT2 | output | Output pin of comparator 2 (open-drain on TLV9024, can be pulled up to 6V max, absolute maximum -0.3V to 6V from V-). |
| 2 | OUT1 | output | Output pin of comparator 1 (open-drain on TLV9024, can be pulled up to 6V max, absolute maximum -0.3V to 6V from V-). |
| 3 | V+ | power_in | Positive supply; recommended supply range VS = (V+) - (V-) is 1.65V to 5.5V. |
| 4 | IN1- | input | Negative (inverting) input of comparator 1; fault-tolerant, absolute maximum -0.3V to 6V from V- and ±10mA input current. |
| 5 | IN1+ | input | Positive (non-inverting) input of comparator 1; fault-tolerant, absolute maximum -0.3V to 6V from V- and ±10mA input current. |
| 6 | IN2- | input | Negative (inverting) input of comparator 2; fault-tolerant, absolute maximum -0.3V to 6V from V- and ±10mA input current. |
| 7 | IN2+ | input | Positive (non-inverting) input of comparator 2; fault-tolerant, absolute maximum -0.3V to 6V from V- and ±10mA input current. |
| 8 | IN3- | input | Negative (inverting) input of comparator 3; fault-tolerant, absolute maximum -0.3V to 6V from V- and ±10mA input current. |
| 9 | IN3+ | input | Positive (non-inverting) input of comparator 3; fault-tolerant, absolute maximum -0.3V to 6V from V- and ±10mA input current. |
| 10 | IN4- | input | Negative (inverting) input of comparator 4; fault-tolerant, absolute maximum -0.3V to 6V from V- and ±10mA input current. |
| 11 | IN4+ | input | Positive (non-inverting) input of comparator 4; fault-tolerant, absolute maximum -0.3V to 6V from V- and ±10mA input current. |
| 12 | V- | power_in | Negative (low) supply, ground reference for the device. |
| 13 | OUT4 | output | Output pin of comparator 4 (open-drain on TLV9024, can be pulled up to 6V max, absolute maximum -0.3V to 6V from V-). |
| 14 | OUT3 | output | Output pin of comparator 3 (open-drain on TLV9024, can be pulled up to 6V max, absolute maximum -0.3V to 6V from V-). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Operational Amplifier/Comparator |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -1.5 | 0.3 | 1.5 | mV | VS = 1.8V and 5V | 13 |
| Input offset voltage over temperature | VOS | -2 | 2 | mV | VS = 1.8V and 5V, TA = -40°C to +125°C | 13 | |
| Quiescent current per comparator | IQ | 16 | 30 | µA | VS = 1.8V and 5V, No Load, Output Low | 13 | |
| Quiescent current per comparator over temperature | IQ | 35 | µA | VS = 1.8V and 5V, No Load, Output Low, TA = -40°C to +125°C | 13 | ||
| Power-supply rejection ratio (open drain) | PSRR | 80 | 95 | dB | VS = 1.8V to 5V, TA = -40°C to +125°C, (open drain version) | 13 | |
| Power-supply rejection ratio (open drain) | PSRR | 100 | µV/V | VS = 1.8V to 5V, TA = -40°C to +125°C, (open drain version) | 13 | ||
| Common-mode rejection ratio 5V | CMRR | 60 | 70 | dB | VS = 5V, (V-), 0.2V < VCM < (V+) + 0.2V, TA = -40°C to +125°C | 13 | |
| Common-mode rejection ratio 1.8V | CMRR | 50 | 60 | dB | VS = 1.8V, (V-), 0.2V < VCM < (V+) + 0.2V, TA = -40°C to +125°C | 13 | |
| Large signal differential voltage amplification | AVD | 50 | 200 | V/mV | For open-drain version only | 13 | |
| Voltage swing from (V-) | VOL | 75 | 125 | mV | ISINK = 4mA, TA = 25°C | 13 | |
| Voltage swing from (V-) over temperature | VOL | 175 | mV | ISINK = 4mA, TA = -40°C to +125°C | 13 | ||
| Open-drain output leakage current | ILKG | 100 | pA | VPULLUP = (V+), TA = 25°C (open drain only) | 13 | ||
| Short-circuit current, sinking | ISC | 90 | 100 | mA | VS = 5V, Sinking | 13 | |
| Input offset voltage drift | dVIO/dT | 0.5 | µV/°C | VS = 1.8V and 5V, TA = -40°C to +125°C | 13 | ||
| Input bias current | IB | 5 | pA | VCM = VS/2 | 13 | ||
| Input offset current | IOS | 1 | pA | VCM = VS/2 | 13 | ||
| Input capacitance, differential | CID | 2 | pF | VCM = VS/2 | 13 | ||
| Input capacitance, common mode | CIC | 3 | pF | VCM = VS/2 | 13 | ||
| Propagation delay, high-to-low | TPD-HL | 100 | ns | VID = -100 mV; mid-point of input to mid-point of output (RP = 2.5 KΩ for open drain only) | 14 | ||
| Propagation delay, low-to-high | TPD-LH | 150 | ns | VID = 100 mV; mid-point of input to mid-point of output (RP = 2.5 KΩ for open drain only) | 14 | ||
| Output fall time | TFALL | 3 | ns | VID = -100 mV, 80% to 20% | 14 | ||
| Toggle frequency | FTOGGLE | 3 | MHz | VID = 100 mV (RP = 2.5 KΩ for open drain only) | 14 | ||
| Power on-time | PON | 30 | µs | VS = 1.8 V and 5 V, VCM = (V-), VID = -0.1 V, VPULL-UP = VS / 2, Delay from VS / 2 to VOUT = 0.1 x VS / 2 (RP = 2.5 KΩ for open drain only) | 14 | ||
| Supply voltage (absolute maximum) | VS | -0.3 | 6 | V | VS = (V+), (V-) | 7 | |
| Input pins voltage (absolute maximum) | -0.3 | 6 | V | IN+, IN- from V- | 7 | ||
| Current into input pins | -10 | 10 | mA | IN+, IN- | 7 | ||
| Output voltage, open drain (absolute maximum) | -0.3 | 6 | V | OUT from V-, open drain only | 7 | ||
| Output short circuit duration | 10 | s | Short-circuit to V- or V+ | 7 | |||
| Junction temperature | TJ | 150 | °C | 7 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 7 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human-body model per ANSI/ESDA/JEDEC JS-001 | 7 | |
| ESD CDM | V(ESD) | -1000 | 1000 | V | Charged-device model per JEDEC JESD22-C101 | 7 | |
| Supply voltage (recommended) | VS | 1.65 | 5.5 | V | VS = (V+), (V-) | 7 | |
| Input voltage range (recommended) | -0.2 | 5.7 | V | IN+, IN- from (V-) | 7 | ||
| Ambient temperature | TA | -40 | 125 | °C | 7 | ||
| Junction-to-ambient thermal resistance | RqJA | 155 | °C/W | PW (TSSOP), 14 pins | 8 | ||
| Junction-to-case (top) thermal resistance | RqJC(top) | 82 | °C/W | PW (TSSOP), 14 pins | 8 | ||
| Junction-to-board thermal resistance | RqJB | 98.5 | °C/W | PW (TSSOP), 14 pins | 8 | ||
| Junction-to-top characterization parameter | yJT | 25.7 | °C/W | PW (TSSOP), 14 pins | 8 | ||
| Junction-to-board characterization parameter | yJB | 97.6 | °C/W | PW (TSSOP), 14 pins | 8 |
CAD (KiCad official)
- Symbol:
TLV9024PWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
tlv9024pwr-etched.step/tlv9024pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv9024pwr.step/tlv9024pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (85 pp, sha256
874c1d4f5ec1c1b4, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).