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TLV9021DBVR

Public Made by Adom

by adom

Texas Instruments Comparators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TLV9021DBVR

Texas Instruments · Comparators · SOT-23-5

TLV9021DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Comparator output (open-drain on TLV9021, which can be pulled up below or beyond the supply voltage, absolute maximum 6V from V-).
2 V- power_in Negative (low) power supply; supply range VS = (V+) - (V-) is 1.65V to 5.5V.
3 IN+ input Non-inverting (positive) input; fault-tolerant, may go up to 6V without damage and with no output phase inversion.
4 IN- input Inverting (negative) input; fault-tolerant, may go up to 6V without damage and with no output phase inversion.
5 V+ power_in Positive power supply; supply range VS = (V+) - (V-) is 1.65V to 5.5V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Amplifiers/Comparators
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VOS -1.5 0.3 1.5 mV VS = 1.8V and 5V, TA = 25°C 9
Input offset voltage over temperature VOS -2 2 mV VS = 1.8V and 5V, TA = -40°C to +125°C 9
Quiescent current IQ 17.1 30 µA VS = 1.8V and 5V, No Load, Output Low 9
Quiescent current over temperature IQ 35 µA VS = 1.8V and 5V, No Load, Output Low, TA = -40°C to +125°C 9
Power-supply rejection ratio (open drain) PSRR 80 95 dB VS = 1.8V to 5V, TA = -40°C to +125°C (open drain version) 9
Common-mode rejection ratio, 5V CMRR 60 70 dB VS = 5V, (V-), 0.2V < VCM < (V+) + 0.2V, TA = -40°C to +125°C 9
Common-mode rejection ratio, 1.8V CMRR 50 60 dB VS = 1.8V, (V-), 0.2V < VCM < (V+) + 0.2V, TA = -40°C to +125°C 9
Large signal differential voltage amplification AVD 50 200 V/mV For open drain version only 9
Output low voltage swing from (V-) VOL 75 125 mV ISINK = 4mA, TA = 25°C 9
Output low voltage swing from (V-) over temperature VOL 175 mV ISINK = 4mA, TA = -40°C to +125°C 9
Open-drain output leakage current ILKG 100 pA VPULLUP = (V+), TA = 25°C (open drain only) 9
Short-circuit current, sinking ISC 90 100 mA VS = 5V, Sinking 9
Input offset voltage drift dVIO/dT 0.5 µV/°C VS = 1.8V and 5V, TA = -40°C to +125°C 9
Input bias current IB 5 pA VCM = VS/2 9
Input offset current IOS 1 pA VCM = VS/2 9
Input capacitance, differential CID 2 pF VCM = VS/2 9
Input capacitance, common mode CIC 3 pF VCM = VS/2 9
Propagation delay, high-to-low TPD-HL 100 ns VID = -100mV; mid-point of input to mid-point of output (RP = 2.5KΩ for open drain only) 10
Propagation delay, low-to-high TPD-LH 150 ns VID = 100mV; mid-point of input to mid-point of output (RP = 2.5KΩ for open drain only) 10
5V output fall time, 80% to 20% TFALL 3 ns VID = -100mV 10
5V toggle frequency FTOGGLE 3 MHz VID = 100mV (RP = 2.5KΩ for open drain only) 10
Power on-time PON 20 µs VS = 1.8V and 5V, VCM = (V-), VID = -0.1V, VPULL-UP = VS / 2, RP = 2.5KΩ for open drain only 10
Supply voltage (absolute maximum) VS -0.3 6 V VS = (V+), (V-) 7
Input pins voltage (absolute maximum) -0.3 6 V IN+, IN- from V- 7
Current into input pins -10 10 mA IN+, IN- 7
Output voltage, open drain (absolute maximum) -0.3 6 V OUT from V-, open drain only 7
Junction temperature TJ 150 °C 7
Storage temperature Tstg -65 150 °C 7
ESD HBM V(ESD) -2000 2000 V Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 7
ESD CDM V(ESD) -1000 1000 V Charged-device model (CDM), per JEDEC specification JESD22-C101 7
Supply voltage (recommended) VS 1.65 5.5 V VS = (V+), (V-) 7
Input voltage range (recommended) -0.2 5.7 V IN+, IN- from (V-) 7
Ambient temperature TA -40 125 °C 7
Junction-to-ambient thermal resistance RqJA 223.7 °C/W DBV (SOT-23), 5 pins 7
Junction-to-case (top) thermal resistance RqJC(top) 123.2 °C/W DBV (SOT-23), 5 pins 7
Junction-to-board thermal resistance RqJB 91.4 °C/W DBV (SOT-23), 5 pins 7
Junction-to-top characterization parameter yJT 58.7 °C/W DBV (SOT-23), 5 pins 7
Junction-to-board characterization parameter yJB 91 °C/W DBV (SOT-23), 5 pins 7

CAD (KiCad official)

  • Symbol: TLV9021DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tlv9021dbvr-etched.step / tlv9021dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv9021dbvr.step / tlv9021dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (85 pp, sha256 874c1d4f5ec1c1b4, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF