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TLV9002IDGKR
Public Made by Adomby adom
Texas Instruments Operational Amplifier, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV9002IDGKR
Texas Instruments · Operational Amplifier · VSSOP-8
TLV9002IDGKR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Output of channel 1. |
| 2 | IN1- | input | Inverting input of channel 1. |
| 3 | IN1+ | input | Noninverting input of channel 1. |
| 4 | V- | power_in | Negative (low) supply or ground for single-supply operation. |
| 5 | IN2+ | input | Noninverting input of channel 2. |
| 6 | IN2- | input | Inverting input of channel 2. |
| 7 | OUT2 | output | Output of channel 2. |
| 8 | V+ | power_in | Positive (high) supply, specified for 1.8 V to 5.5 V total supply voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | Amplifiers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -1.6 | 0.4 | 1.6 | mV | VS = 5 V, TA = 25°C | 17 |
| Input offset voltage over temperature | VOS | -2 | 2 | mV | VS = 5 V, TA = -40°C to 125°C | 17 | |
| Power-supply rejection ratio | PSRR | 80 | 105 | dB | VS = 1.8 to 5.5 V, VCM = (V-) | 17 | |
| Common-mode voltage range | VCM | -0.1 | 0.1 | V | No phase reversal, rail-to-rail input; (V-), 0.1 to (V+) + 0.1 | 17 | |
| Common-mode rejection ratio | CMRR | 86 | dB | VS = 1.8 V, (V-), 0.1 V < VCM < (V+), 1.4 V, TA = -40°C to 125°C | 17 | ||
| Common-mode rejection ratio | CMRR | 95 | dB | VS = 5.5 V, (V-), 0.1 V < VCM < (V+), 1.4 V, TA = -40°C to 125°C | 17 | ||
| Common-mode rejection ratio | CMRR | 63 | 77 | dB | VS = 5.5 V, (V-), 0.1 V < VCM < (V+) + 0.1 V, TA = -40°C to 125°C | 17 | |
| Common-mode rejection ratio | CMRR | 68 | dB | VS = 1.8 V, (V-), 0.1 V < VCM < (V+) + 0.1 V, TA = -40°C to 125°C | 17 | ||
| Open-loop voltage gain | AOL | 104 | 117 | dB | VS = 5.5 V, (V-) + 0.05 V < VO < (V+), 0.05 V, RL = 10 kΩ | 17 | |
| Open-loop voltage gain | AOL | 100 | dB | VS = 1.8 V, (V-) + 0.04 V < VO < (V+), 0.04 V, RL = 10 kΩ | 17 | ||
| Voltage output swing from supply rails | VO | 10 | 20 | mV | VS = 5.5 V, RL = 10 kΩ | 17 | |
| Voltage output swing from supply rails | VO | 35 | 55 | mV | VS = 5.5 V, RL = 2 kΩ | 17 | |
| Specified voltage range | VS | 1.8 | 5.5 | V | 18 | ||
| Quiescent current per amplifier | IQ | 60 | 75 | µA | IO = 0 mA, VS = 5.5 V | 18 | |
| Quiescent current per amplifier over temperature | IQ | 85 | µA | IO = 0 mA, VS = 5.5 V, TA = -40°C to 125°C | 18 | ||
| VOS vs temperature | dVOS/dT | 0.6 | µV/°C | TA = -40°C to 125°C | 17 | ||
| Input bias current | IB | 5 | pA | VS = 5 V | 17 | ||
| Gain-bandwidth product | GBW | 1 | MHz | VS = 5 V | 17 | ||
| Slew rate | SR | 2 | V/µs | VS = 5 V | 17 | ||
| Short-circuit current | ISC | 40 | mA | VS = 5.5 V | 17 | ||
| Supply voltage | (V+), (V-) | 7 | V | 14 | |||
| Signal input common-mode voltage | -0.5 | 0.5 | V | (V-), 0.5 to (V+) + 0.5 | 14 | ||
| Signal input current | -10 | 10 | mA | 14 | |||
| Operating temperature | TA | -55 | 150 | °C | 14 | ||
| Junction temperature | TJ | 150 | °C | 14 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 14 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | ANSI/ESDA/JEDEC JS-001 | 14 | |
| ESD CDM | V(ESD) | -1000 | 1000 | V | JESD22-C101 | 14 | |
| Supply voltage | VS | 1.8 | 5.5 | V | 14 | ||
| Specified temperature | TA | -40 | 125 | °C | 14 | ||
| Junction-to-ambient thermal resistance | RθJA | 201.2 | °C/W | DGK (VSSOP), 8 pins | 15 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 85.7 | °C/W | DGK (VSSOP), 8 pins | 15 | ||
| Junction-to-board thermal resistance | RθJB | 122.9 | °C/W | DGK (VSSOP), 8 pins | 15 | ||
| Junction-to-top characterization parameter | ψJT | 21.2 | °C/W | DGK (VSSOP), 8 pins | 15 | ||
| Junction-to-board characterization parameter | ψJB | 121.4 | °C/W | DGK (VSSOP), 8 pins | 15 |
CAD (KiCad official)
- Symbol:
TLV9002IDGKR - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
tlv9002idgkr-etched.step/tlv9002idgkr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv9002idgkr.step/tlv9002idgkr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (110 pp, sha256
ff042e4d6715289a, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).