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TLV840CADL40DBVR
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Texas Instruments Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLV840CADL40DBVR
Texas Instruments · Supervisor And Reset ICs · SOT-23-5
TLV840CADL40DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | output | Active-low open-drain reset output on the TLV840CxDL variant that is driven low when VDD falls below VIT- and stays low for the delay time tD after VDD rises above VIT+, with a -0.3 V to 6.5 V absolute voltage limit and ±20 mA absolute current limit. |
| 2 | VDD | power_in | Supply input monitored by the supervisor, with a recommended operating range of 0.7 V to 6 V and an absolute maximum of -0.3 V to 6.5 V. |
| 3 | GND | power_in | Ground reference pin for the device. |
| 4 | NC | unconnected | No connect on the TLV840C; the pin can be left floating, and the datasheet gives a recommended connection to GND. |
| 5 | CT | passive | Capacitor time-delay pin where an external capacitor to ground sets the reset delay, with the pin left floating for the minimum fixed delay of about 40 µs, and a recommended operating range of 0 V to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
TLV840CADL40DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tlv840cadl40dbvr-etched.step/tlv840cadl40dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv840cadl40dbvr.step/tlv840cadl40dbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
a8df9af31101d134, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLV840CADL40DBVR
**Texas Instruments** · Supervisor And Reset ICs · SOT-23-5
TLV840CADL40DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | output | Active-low open-drain reset output on the TLV840CxDL variant that is driven low when VDD falls below VIT- and stays low for the delay time tD after VDD rises above VIT+, with a -0.3 V to 6.5 V absolute voltage limit and ±20 mA absolute current limit. |
| 2 | VDD | power_in | Supply input monitored by the supervisor, with a recommended operating range of 0.7 V to 6 V and an absolute maximum of -0.3 V to 6.5 V. |
| 3 | GND | power_in | Ground reference pin for the device. |
| 4 | NC | unconnected | No connect on the TLV840C; the pin can be left floating, and the datasheet gives a recommended connection to GND. |
| 5 | CT | passive | Capacitor time-delay pin where an external capacitor to ground sets the reset delay, with the pin left floating for the minimum fixed delay of about 40 µs, and a recommended operating range of 0 V to 6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `TLV840CADL40DBVR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tlv840cadl40dbvr-etched.step` / `tlv840cadl40dbvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv840cadl40dbvr.step` / `tlv840cadl40dbvr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv840) (34 pp, sha256 `a8df9af31101d134`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tlv840cadl40dbvr-datasheet.pdf)