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TLV840CADL29DBVR

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Texas Instruments Supervisor and Reset ICs, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tlv840cadl29dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers tlv840cadl29dbvr: viewers · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md tlv840cadl29dbvr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 15d ago
tlv840cadl29dbvr-etched.fit.json tlv840cadl29dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tlv840cadl29dbvr-etched.glb tlv840cadl29dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tlv840cadl29dbvr-etched.step tlv840cadl29dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tlv840cadl29dbvr.glb Publish 0.1.0 · Ray 1mo ago
tlv840cadl29dbvr.kicad_mod Publish 0.1.0 · Ray 1mo ago
tlv840cadl29dbvr.kicad_sym Publish 0.1.0 · Ray 1mo ago
tlv840cadl29dbvr.lbr Publish 0.1.0 · Ray 1mo ago
tlv840cadl29dbvr.step Publish 0.1.0 · Ray 1mo ago

TLV840CADL29DBVR

Texas Instruments · Supervisor and Reset ICs · SOT-23-5

TLV840CADL29DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RESET output Active-low, open-drain reset output. Asserted low when VDD falls below the negative voltage threshold (VIT-). RESET remains asserted for the delay time tD after VDD rises above VIT+ (= VIT- + VHYS). Requires an external pull-up resistor to VDD (or another rail up to 6 V); absolute-max current +/-20 mA, recommended <= 5 mA.
2 VDD power_in Input supply voltage; also the monitored rail. Operating range 0.7 V to 6 V (abs-max 6.5 V). Typical supply current 120 nA. Bypass with a local ceramic capacitor close to the pin.
3 GND power_in Device ground reference.
4 NC unconnected No connect. Pin may be left floating; TI recommends tying to GND. On the TLV840M variant this pin is the manual-reset MR input, but on the TLV840C ordered here it is NC.
5 CT passive Capacitor time-delay pin. Program the reset time delay tD by connecting an external capacitor between CT and GND. Leave floating for the minimum ~40 us delay. Abs-max voltage -0.3 V to VDD+0.3 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TLV840CADL29DBVR
  • TLV840CADL29DBVRDBVT

CAD (KiCad official)

  • Symbol: TLV840CADL29DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tlv840cadl29dbvr-etched.step / tlv840cadl29dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv840cadl29dbvr.step / tlv840cadl29dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 633f808ea9d57097, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF