component
TLV809L30DBZR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SOT-23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLV809L30DBZR
Texas Instruments · Supervisor And Reset ICs · SOT-23-3
TLV809L30DBZR from Texas Instruments, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; this pin must be connected to ground with a low-impedance connection. |
| 2 | RESET | output | Active-low push-pull RESET output that asserts when VDD is below the threshold voltage VIT and deasserts after the delay time td once VDD rises above VIT. |
| 3 | VDD | power_in | Supply voltage pin with a recommended supply range of 2 V to 6 V; a 0.1-µF ceramic capacitor from this pin to ground is recommended to improve threshold stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | 2 | 6 | V | 5 | ||
| Operating free-air temperature range | TA | -40 | 85 | °C | 5 | ||
| Supply voltage | VDD | 6.5 | V | 5 | |||
| All other pins | -0.3 | 6.5 | V | 5 | |||
| Maximum low output current | IOL | 5 | mA | 5 | |||
| Maximum high output current | IOH | -5 | mA | 5 | |||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VDD | 5 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 5 | |
| Operating free-air temperature | TA | -40 | 85 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Low-level output voltage | VOL | 0.3 | V | VDD = 2 V to 6 V, IOH = 500 µA | 6 | ||
| Low-level output voltage | VOL | 0.4 | V | VDD = 3.3 V, IOH = 2 mA | 6 | ||
| Negative-going input threshold voltage (TLV809L30) | VIT- | 2.58 | 2.64 | 2.7 | V | TA = -40°C to +85°C | 6 |
| Power-up reset voltage | 0.2 | V | VDD ≥ 1.1 V, IOL = 50 µA | 6 | |||
| Supply current | IDD | 9 | 12 | µA | VDD = 2 V, RESET is unconnected | 6 | |
| Supply current | IDD | 20 | 25 | µA | VDD = 6 V, RESET is unconnected | 6 | |
| Input capacitance | CI | 5 | pF | VI = 0 V to VDD | 6 | ||
| Pulse duration at VDD | tw | 10 | µs | VDD = VIT- + 0.2 V, VDD = VIT-, 0.2 V | 6 | ||
| Delay time | td | 120 | 200 | 280 | ms | VDD ≥ VIT- + 0.2 V; see Figure 7-1 | 6 |
| Propagation (delay) time, high-to-low-level output | tPHL | 10 | µs | VIL = VIT-, 0.2 V, VIH = VIT- + 0.2 V | 6 | ||
| Hysteresis (TLV809L30) | Vhys | 35 | mV | 6 | |||
| VDD bypass capacitor | CIN | 0.1 | µF | 5 | |||
| Junction-to-ambient thermal resistance (DBZ) | RθJA | 286.9 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance (DBZ) | RθJC(top) | 105.6 | °C/W | 5 | |||
| Junction-to-board thermal resistance (DBZ) | RθJB | 124.4 | °C/W | 5 | |||
| Junction-to-top characterization parameter (DBZ) | ψJT | 25.8 | °C/W | 5 | |||
| Junction-to-board characterization parameter (DBZ) | ψJB | 107.9 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
TLV809L30DBZR - Footprint:
Package_TO_SOT_SMD:SOT-23-3 - 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files:
tlv809l30dbzr-etched.step/tlv809l30dbzr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv809l30dbzr.step/tlv809l30dbzr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
c74cde4023de3954, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLV809L30DBZR
**Texas Instruments** · Supervisor And Reset ICs · SOT-23-3
TLV809L30DBZR from Texas Instruments, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; this pin must be connected to ground with a low-impedance connection. |
| 2 | RESET | output | Active-low push-pull RESET output that asserts when VDD is below the threshold voltage VIT and deasserts after the delay time td once VDD rises above VIT. |
| 3 | VDD | power_in | Supply voltage pin with a recommended supply range of 2 V to 6 V; a 0.1-µF ceramic capacitor from this pin to ground is recommended to improve threshold stability. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | 2 | | 6 | V | | 5 |
| Operating free-air temperature range | TA | -40 | | 85 | °C | | 5 |
| Supply voltage | VDD | | | 6.5 | V | | 5 |
| All other pins | | -0.3 | | 6.5 | V | | 5 |
| Maximum low output current | IOL | | | 5 | mA | | 5 |
| Maximum high output current | IOH | | | -5 | mA | | 5 |
| Input clamp current | IIK | -20 | | 20 | mA | VI < 0 or VI > VDD | 5 |
| Output clamp current | IOK | -20 | | 20 | mA | VO < 0 or VO > VDD | 5 |
| Operating free-air temperature | TA | -40 | | 85 | °C | | 5 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 5 |
| Low-level output voltage | VOL | | | 0.3 | V | VDD = 2 V to 6 V, IOH = 500 µA | 6 |
| Low-level output voltage | VOL | | | 0.4 | V | VDD = 3.3 V, IOH = 2 mA | 6 |
| Negative-going input threshold voltage (TLV809L30) | VIT- | 2.58 | 2.64 | 2.7 | V | TA = -40°C to +85°C | 6 |
| Power-up reset voltage | | | | 0.2 | V | VDD ≥ 1.1 V, IOL = 50 µA | 6 |
| Supply current | IDD | | 9 | 12 | µA | VDD = 2 V, RESET is unconnected | 6 |
| Supply current | IDD | | 20 | 25 | µA | VDD = 6 V, RESET is unconnected | 6 |
| Input capacitance | CI | | 5 | | pF | VI = 0 V to VDD | 6 |
| Pulse duration at VDD | tw | 10 | | | µs | VDD = VIT- + 0.2 V, VDD = VIT-, 0.2 V | 6 |
| Delay time | td | 120 | 200 | 280 | ms | VDD ≥ VIT- + 0.2 V; see Figure 7-1 | 6 |
| Propagation (delay) time, high-to-low-level output | tPHL | | | 10 | µs | VIL = VIT-, 0.2 V, VIH = VIT- + 0.2 V | 6 |
| Hysteresis (TLV809L30) | Vhys | | 35 | | mV | | 6 |
| VDD bypass capacitor | CIN | | 0.1 | | µF | | 5 |
| Junction-to-ambient thermal resistance (DBZ) | RθJA | | 286.9 | | °C/W | | 5 |
| Junction-to-case (top) thermal resistance (DBZ) | RθJC(top) | | 105.6 | | °C/W | | 5 |
| Junction-to-board thermal resistance (DBZ) | RθJB | | 124.4 | | °C/W | | 5 |
| Junction-to-top characterization parameter (DBZ) | ψJT | | 25.8 | | °C/W | | 5 |
| Junction-to-board characterization parameter (DBZ) | ψJB | | 107.9 | | °C/W | | 5 |
## CAD (KiCad official)
- Symbol: `TLV809L30DBZR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files: `tlv809l30dbzr-etched.step` / `tlv809l30dbzr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv809l30dbzr.step` / `tlv809l30dbzr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlv809.pdf) (26 pp, sha256 `c74cde4023de3954`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tlv809l30dbzr-datasheet.pdf)