component

TLV803EA43VDBZR

Public Made by Adom

by adom

Texas Instruments Supervisor And Reset ICs, SOT-23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tlv803ea43vdbzrfactory-2.0.0extractor-text

Verified TLV803EA43VDBZR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLV803EA43VDBZR · SOT-23-3 · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 52-page datasheet
  • ✓distributor: lcsc C3685692, digikey 296-TLV803EA43VDBZRTR-ND, mouser 595-TLV803EA43VDBZR
  • ✓family: SOT-23-3
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-1gldu7gd/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tlv803ea43vdbzr.kicad_sym✓ tlv803ea43vdbzr.kicad_mod✓ tlv803ea43vdbzr.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
tlv803ea43vdbzr / README.md
History Download
Ray Publish 0.1.0 07bb778 1d ago

TLV803EA43VDBZR

Texas Instruments · Supervisor And Reset ICs · SOT-23-3

TLV803EA43VDBZR from Texas Instruments, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RESET output Active-low open-drain output reset signal (TLV803E) that is driven low when VDD falls below VIT-, stays low for the delay time tD after VDD rises above VIT+, and requires an external pull-up resistor.
2 VDD power_in Input supply voltage monitored by the supervisor, specified for 1.7 V to 6 V (VDD absolute maximum 6.5 V).
3 GND power_in Ground reference pin for the device (V pinout: pin 3 = GND).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-3
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input supply voltage VDD 1.7 6 V 6
Input supply voltage VDD 1.7 6 V 8
VDD pin voltage VDD -0.3 6.5 V 6
RESET pin and RESET pin voltage VRESET, VRESET 0 6 V 6
RESET pin and RESET pin current IRESET, IRESET 0 5 mA MAX printed as ±5 mA 6
Junction temperature (free air temperature) TJ -40 125 °C 6
RESET (TLV803E) voltage RESET -0.3 6.5 V 6
Output sink and source current -20 20 mA 6
Operating ambient temperature TA -40 125 °C 6
Storage temperature Tstg -65 150 °C 6
Input threshold voltage accuracy VIT- -2 0.5 2 % TA = -40℃ to 125℃ 8
Hysteresis voltage VHYS 0.9 1.2 1.5 % Hysteresis from VIT- 8
Supply current into VDD pin IDD 0.25 1 µA VDD = 3.3 V; VDD > VIT+ 8
Supply current into VDD pin IDD 0.4 1.2 µA VDD = 6 V 8
Power on reset voltage VPOR 700 mV VOL ≤ 300 mV, IOUT(Sink) = 15 µA 8
Low level output voltage VOL 300 mV VDD = 1.7 V, VDD < VIT-, IOUT(Sink) = 500 µA 8
Open drain output leakage current Ilkg(OD) 100 350 nA VDD = VPULLUP = 6 V, VDD > VIT+ 8
Glitch immunity tGI 10 µs 5 % Overdrive(1) 9
Propagation delay from VDD falling below VIT- to RESET tPD_HL 30 50 µs VDD = (VIT+ + 30%) to (VIT-, 10%) 9
Release time or reset timeout period, variant A tD 130 200 270 ms Reset time delay variant A 9
Junction-to-ambient thermal resistance (DBZ SOT23-3) RθJA 254.8 °C/W DBZ (SOT23-3) package 7
Junction-to-case (top) thermal resistance (DBZ SOT23-3) RθJC(top) 150.5 °C/W DBZ (SOT23-3) package 7
Junction-to-board thermal resistance (DBZ SOT23-3) RθJB 140.1 °C/W DBZ (SOT23-3) package 7
Junction-to-top characterization parameter (DBZ SOT23-3) ψJT 48.1 °C/W DBZ (SOT23-3) package 7
Junction-to-board characterization parameter (DBZ SOT23-3) ψJB 139.1 °C/W DBZ (SOT23-3) package 7

CAD (KiCad official)

  • Symbol: TLV803EA43VDBZR
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: tlv803ea43vdbzr-etched.step / tlv803ea43vdbzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv803ea43vdbzr.step / tlv803ea43vdbzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (52 pp, sha256 74ac4474d86c3597, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF