component
TLV803EA29DBZR
Public Made by Adomby adom
Texas Instruments Monitors & Reset Circuits, SOT-23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 3d ago |
| viewers | 3d ago |
| package.json | 3d ago |
| page.json | 3d ago |
| README.md | 3d ago |
| tlv803ea29dbzr-etched.glb | 3d ago |
| tlv803ea29dbzr-etched.step | 3d ago |
| tlv803ea29dbzr-hero.glb | 3d ago |
| tlv803ea29dbzr-hero.overlay.json | 3d ago |
| tlv803ea29dbzr.glb | 3d ago |
| tlv803ea29dbzr.kicad_mod | 3d ago |
| tlv803ea29dbzr.kicad_sym | 3d ago |
| tlv803ea29dbzr.lbr | 3d ago |
| tlv803ea29dbzr.step | 3d ago |
TLV803EA29DBZR
Texas Instruments · Monitors & Reset Circuits · SOT-23-3
TLV803EA29DBZR from Texas Instruments, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground. |
| 2 | RESET | output | Open-drain active-low reset output (requires external pull-up resistor, up to 6 V) that is driven low when VDD falls below VIT- and stays low for the 200 ms delay time (tD) after VDD rises above VIT+. |
| 3 | VDD | power_in | Input supply voltage monitored by the device, with a recommended operating range of 1.7 V to 6 V and a 0.1-µF to 1-µF bypass capacitor recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-3 |
| Category | Power Supply Chip |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input threshold voltage accuracy | VIT- | -2 | 0.5 | 2 | % | TA= -40℃ to 125℃ | 8 |
| Hysteresis voltage | VHYS | 0.9 | 1.2 | 1.5 | % | Hysteresis from VIT- | 8 |
| Supply current into VDD pin | IDD | 0.25 | 1 | µA | VDD = 3.3 V; VDD > VIT+ | 8 | |
| Supply current into VDD pin | IDD | 0.4 | 1.2 | µA | VDD = 6 V | 8 | |
| Input supply voltage | VDD | 1.7 | 6 | V | 8 | ||
| Power on reset voltage | VPOR | 700 | mV | VOL ≤ 300 mV, IOUT(Sink) = 15 µA | 8 | ||
| Low level output voltage | VOL | 300 | mV | VDD = 1.7 V, VDD < VIT-, IOUT(Sink) = 500 µA | 8 | ||
| Open drain output leakage current | Ilkg(OD) | 100 | 350 | nA | VDD = VPULLUP = 6 V, VDD > VIT+ | 8 | |
| Glitch immunity | tGI | 10 | µs | 5 % Overdrive | 9 | ||
| Propagation delay from VDD falling below VIT- to RESET | tPD_HL | 30 | 50 | µs | VDD = (VIT+ + 30%) to (VIT-, 10%) | 9 | |
| Release time or reset timeout period, variant A | tD | 130 | 200 | 270 | ms | Reset time delay variant A | 9 |
| VDD pin voltage | VDD | -0.3 | 6.5 | V | 6 | ||
| RESET voltage (TLV803E) | VRESET | -0.3 | 6.5 | V | 6 | ||
| Output sink and source current | -20 | 20 | mA | 6 | |||
| Operating ambient temperature | TA | -40 | 125 | °C | 6 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| ESD human body model | V(ESD) | -2000 | 2000 | V | HBM, ANSI/ESDA/JEDEC JS-001 | 6 | |
| ESD charged device model | V(ESD) | -500 | 500 | V | CDM, JESD22-C101 | 6 | |
| Input supply voltage | VDD | 1.7 | 6 | V | 6 | ||
| RESET pin voltage | VRESET | 0 | 6 | V | 6 | ||
| RESET pin current | IRESET | 0 | 5 | mA | 6 | ||
| Junction temperature (free air temperature) | TJ | -40 | 125 | °C | 6 | ||
| Junction-to-ambient thermal resistance | RθJA | 254.8 | °C/W | DBZ (SOT23-3) | 7 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 150.5 | °C/W | DBZ (SOT23-3) | 7 | ||
| Junction-to-board thermal resistance | RθJB | 140.1 | °C/W | DBZ (SOT23-3) | 7 | ||
| Junction-to-top characterization parameter | ψJT | 48.1 | °C/W | DBZ (SOT23-3) | 7 | ||
| Junction-to-board characterization parameter | ψJB | 139.1 | °C/W | DBZ (SOT23-3) | 7 |
CAD (KiCad official)
- Symbol:
TLV803EA29DBZR - Footprint:
Package_TO_SOT_SMD:SOT-23-3 - 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files:
tlv803ea29dbzr-etched.step/tlv803ea29dbzr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv803ea29dbzr.step/tlv803ea29dbzr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (50 pp, sha256
70d0aa54018bf013, retrieved 2026-10-22, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).