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TLV76708DRVR

Texas Instruments · Pre-ordered Chips · WSON-6(2x2)

TLV76708DRVR from Texas Instruments, in a WSON-6(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated output pin; use the recommended output capacitor (1 µF minimum, effective 0.5 µF minimum for stability) placed as close to OUT and GND as possible.
2 SNS input Output sense pin for fixed-voltage versions; connect to OUT or to the load for remote sensing, and do not float this pin.
3 GND power_in Ground pin; all ground pins must be grounded.
4 EN input Enable pin; high enables the device and low disables it, with an internal pullup so it can be left floating or tied to IN.
5 GND power_in Ground pin; all ground pins must be grounded.
6 IN power_in Input supply pin (2.5 V to 16 V); use the recommended 1 µF input capacitor placed as close to IN and GND as possible.
7 Thermal pad passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6(2x2)
Category Interface ICs
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Nominal output accuracy VOUT -0.5 0.5 % TJ = 25°C 6
Output accuracy over temperature VOUT -1 1 % VIN ≥ 3.0 V, 1 mA ≤ IOUT ≤ 1 A 6
Line regulation ΔVOUT(ΔVIN) 0.02 %/V VOUT(NOM) +1.5 V ≤ VIN ≤ 16 V, IOUT = 10 mA 6
Load regulation ΔVOUT(ΔIOUT) 0.1 0.5 %/A 1 mA ≤ IOUT ≤ 1 A, VIN ≥ 3.0 V 6
Dropout voltage VDO 0.9 1.4 V VIN ≥ 3.0V, IOUT = 1 A, DRV package 6
Dropout voltage VDO 0.8 1.3 V 2.5 V ≤ VIN < 3.0 V, IOUT = 800 mA 6
Output current limit ICL 1.1 1.6 A VOUT = 0.9 x VOUT(NOM), VIN ≥ 3.0V 6
Output current limit ICL 0.81 1.6 A VOUT = 0.9 x VOUT(NOM), 2.5 V ≤ VIN < 3.0 V 6
Short-circuit current limit ISC 150 250 350 mA VOUT = 0 V, DRV package 6
Quiescent current (fixed output) IQ 60 95 µA Fixed output devices, IOUT = 0 mA 6
Ground current IGND 1.5 mA IOUT = 1 A, VIN ≥ 3.0 V 6
Shutdown current ISHUTDOWN 1.5 3 µA VEN ≤ 0.4 V, VIN = 16 V 6
Enable pin logic high VEN(HIGH) 1.2 V 2.5 V ≤ VIN ≤ 16 V 6
Enable pin logic low VEN(LOW) 0.4 V 2.5 V ≤ VIN ≤ 16 V 6
Enable pullup current IEN 400 nA VEN = 0 V 6
Output pulldown current IPULLDOWN 1.2 mA VIN = 16 V, VOUT = 2.5 V, VEN=0V 6
Power-supply rejection ratio PSRR 70 dB VIN = 3.3 V, VOUT = 1.8 V, IOUT = 300 mA, f = 120 Hz 6
Output noise voltage Vn 60 µVRMS BW = 10 Hz to 100 kHz, VIN = 3.3 V, VOUT = 0.8 V, IOUT = 100 mA 6
UVLO threshold rising VUVLO+ 2.2 2.4 V VIN rising 6
UVLO hysteresis VUVLO(HYS) 130 mV 7
UVLO threshold falling VUVLO- 1.9 V VIN falling 7
Thermal shutdown temperature TSD(shutdown) 180 ºC Temperature increasing 7
Thermal shutdown reset temperature TSD(reset) 160 ºC Temperature falling 7
Input voltage VIN 2.5 16 V 5
Enable voltage VEN 0 16 V 5
Output current IOUT 0 0.8 A 2.5 V ≤ VIN < 3 V 5
Output current IOUT 0 1 A VIN ≥ 3 V 5
Output capacitor COUT 1 2.2 220 µF Effective output capacitance of 0.5 µF minimum required for stability 5
Output capacitor ESR COUT ESR 2 500 mΩ 5
Input capacitor CIN 1 µF 5
Junction temperature TJ -40 125 °C 5
Input voltage VIN -0.3 18 V 5
Output voltage VOUT -0.3 V Max is VIN + 0.3 V or 18 V (whichever is smaller) 5
SNS voltage VSNS -0.3 V Max is VIN + 0.3 V or 18 V (whichever is smaller) 5
Enable voltage VEN -0.3 18 V 5
Operating junction temperature TJ -50 150 °C 5
Storage temperature TSTG -65 150 °C 5
ESD HBM V(ESD) -3000 3000 V Human body model, all pins 5
ESD CDM V(ESD) -1000 1000 V Charged device model, all pins 5
Junction-to-ambient thermal resistance RθJA 77.7 °C/W DRV (WSON) 6 pins 6
Junction-to-case (top) thermal resistance RθJC(top) 92.3 °C/W DRV (WSON) 6 pins 6
Junction-to-board thermal resistance RθJB 40.8 °C/W DRV (WSON) 6 pins 6
Junction-to-top characterization parameter ΨJT 4.3 °C/W DRV (WSON) 6 pins 6
Junction-to-board characterization parameter ΨJB 40.8 °C/W DRV (WSON) 6 pins 6
Junction-to-case (bottom) thermal resistance RθJC(bot) 18.9 °C/W DRV (WSON) 6 pins 6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper • Use copper planes for device connections to IN, OUT, and GND pins to optimize thermal performance 24

CAD (KiCad official)

  • Symbol: TLV76708DRVR
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6(2x2) (KiCad packages3D, STEP)
  • 3D model files: tlv76708drvr-etched.step / tlv76708drvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv76708drvr.step / tlv76708drvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 4b6c90cec1ba8e19, retrieved 2026-10-31, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF