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TLV76701QWDRBRQ1

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tlv76701qwdrbrq1factory-2.0.0extractor-text

Verified TLV76701QWDRBRQ1

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 9 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLV76701QWDRBRQ1 · WSON-8-EP(3x3) · 9 pins
  • ✓copper: 9 copper pads, none touching another net
  • ✓datasheet: all 9 pin names found in the 30-page datasheet
  • ✓distributor: lcsc C2861199, digikey 296-TLV76701QWDRBRQ1TR-ND, mouser 595-TLV76701QWDRBRQ1
  • ✓family: WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-yxg9jpqr/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 9 pins = 9 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 9 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tlv76701qwdrbrq1.kicad_sym✓ tlv76701qwdrbrq1.kicad_mod✓ tlv76701qwdrbrq1.step
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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 1d ago
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package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
tlv76701qwdrbrq1-etched.glb Publish 0.1.0 · Ray 1d ago
tlv76701qwdrbrq1-etched.step tlv76701qwdrbrq1: factory component page (tier=mfr) · Ray 1d ago
tlv76701qwdrbrq1-hero.glb tlv76701qwdrbrq1: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
tlv76701qwdrbrq1-hero.overlay.json Publish 0.1.0 · Ray 1d ago
tlv76701qwdrbrq1.glb Publish 0.1.0 · Ray 1d ago
tlv76701qwdrbrq1.kicad_mod Publish 0.1.0 · Ray 1d ago
tlv76701qwdrbrq1.kicad_sym Publish 0.1.0 · Ray 1d ago
tlv76701qwdrbrq1.lbr Publish 0.1.0 · Ray 1d ago
tlv76701qwdrbrq1.step Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier mfr, 9 pins · Ray 1d ago

TLV76701QWDRBRQ1

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-8-EP(3x3)

TLV76701QWDRBRQ1 from Texas Instruments, in a WSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Output pin; use the recommended output capacitor from the Recommended Operating Conditions table, placed as close to the OUT and GND pins as possible.
2 NC unconnected Not internally connected; this pin can be left floating or connected to GND for best thermal performance.
3 FB input Feedback input to the control-loop error amplifier used with external resistors to set the output voltage; do not float this pin.
4 GND power_in Ground pin; all ground pins must be grounded.
5 EN input Enable pin; driving it high enables the device and driving it low disables it, with thresholds listed in the Electrical Characteristics table.
6 GND power_in Ground pin; all ground pins must be grounded.
7 NC unconnected Not internally connected; this pin can be left floating or connected to GND for best thermal performance.
8 IN power_in Input pin; use the recommended input capacitor from the Recommended Operating Conditions table, placed as close to the IN and GND pins as possible.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-8-EP(3x3)
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN 2.5 16 V 5
Enable voltage VEN 0 16 V 5
Output voltage (adjustable) VOUT 0.8 14.6 V 5
Output current IOUT 0 1 A 5
Output capacitor COUT 1 2.2 220 µF Effective output capacitance of 0.5 µF minimum required for stability 5
Output capacitor ESR COUT ESR 2 500 mΩ 5
Feed-forward capacitor (adjustable) CFF 10 pF Required for stability if feedback divider current < 5 µA 5
Ambient temperature range TA -40 125 °C 5
Junction temperature range TJ -40 150 °C 5
Input pin voltage VIN -0.3 18 V All voltages with respect to GND 4
Output pin voltage VOUT -0.3 V Max VIN + 0.3 V or 18 V, whichever is smaller 4
Feedback pin voltage VFB -0.3 3 V Feedback pin FB 4
Enable pin voltage VEN -0.3 18 V Enable pin EN 4
Ambient temperature (absolute maximum) TA -40 125 °C Operating free-air temperature 4
Operating junction temperature (absolute maximum) TJ -50 150 °C 4
Storage temperature TSTG -65 150 °C 4
VOUT output accuracy at TJ = 25°C VOUT -0.5 0.5 % TJ = 25°C 6
VOUT output accuracy over temperature VOUT -1 1 % TJ = -40°C to 150°C, VIN ≥ 3.0 V, 1 mA ≤ IOUT ≤ 1 A 6
VOUT output accuracy at low input VOUT -1 1 % 2.5 V ≤ VIN < 3.0 V, 1 mA ≤ IOUT ≤ 800 mA 6
Internal reference accuracy at TJ = 25°C VREF -0.5 0.5 % TJ = 25°C, adjustable device 6
Internal reference accuracy over temperature VREF -1 1 % TJ = -40°C to 150°C, adjustable device 6
Feedback pin current IFB -20 1 50 nA VFB = 1 V 6
Load regulation ΔVOUT(ΔIOUT) 0.1 0.5 %/A 1 mA ≤ IOUT ≤ 1 A, VIN ≥ 3.0 V 6
Load regulation at low input ΔVOUT(ΔIOUT) 0.1 0.5 %/A 1 mA ≤ IOUT ≤ 800 mA, 2.5 V ≤ VIN < 3.0 V 6
Dropout voltage VDO 0.63 0.94 1.5 V VIN(NOM) ≥ 3.0 V, IOUT = 1 A 6
Dropout voltage at low input VDO 0.48 0.8 1.4 V 2.5 V ≤ VIN(NOM) < 3.0 V, IOUT = 800 mA 6
Output current limit ICL 1.1 1.37 1.6 A VOUT = 0.9 x VOUT(NOM), VIN ≥ 3.0 V 6
Output current limit at low input ICL 0.81 1.28 1.6 A VOUT = 0.9 x VOUT(NOM), 2.5 V ≤ VIN < 3.0 V 6
Short-circuit current limit ISC 150 250 350 mA VOUT = 0 V 6
Quiescent current (adjustable) IQ 25 50 80 µA Adjustable output device, IOUT = 0 mA 6
Ground current IGND 1.5 mA IOUT = 1 A, VIN ≥ 3.0 V 6
Shutdown current ISHUTDOWN 0.1 1.6 4 µA VEN ≤ 0.4 V, VIN = 16 V 6
Enable pin logic high threshold VEN(HIGH) 1.2 V 2.5 V ≤ VIN ≤ 16 V 6
Enable pin logic low threshold VEN(LOW) 0.4 V 2.5 V ≤ VIN ≤ 16 V 6
Enable pullup current IEN 200 400 800 nA VEN = 0 V 6
Output pulldown current IPULLDOWN 0.9 1.4 1.6 mA VIN = 16 V, VOUT = 2.5 V, VEN = 0 V 6
UVLO threshold rising VUVLO+ 2 2.22 2.4 V VIN rising 6
UVLO threshold falling VUVLO- 1.9 2.09 2.3 V VIN falling 6
UVLO hysteresis VUVLO(HYS) 100 130 200 mV 6
Thermal shutdown temperature TSD(shutdown) 180 °C Temperature increasing 6
Thermal shutdown reset temperature TSD(reset) 160 °C Temperature falling 6
Power-supply rejection ratio PSRR 70 dB VIN = 3.3 V, VOUT = 1.8 V, IOUT = 300 mA, f = 120 Hz 6
Output noise voltage Vn 60 µVRMS BW = 10 Hz to 100 kHz, VIN = 3.3 V, VOUT = 0.8 V, IOUT = 100 mA 6
Feedback voltage VFB 0.8 V 6
Line regulation ΔVOUT(ΔVIN) 0.02 %/V VOUT(NOM) +1.5 V ≤ VIN ≤ 16 V, IOUT = 10 mA 6
Junction-to-ambient thermal resistance RθJA 51.9 °C/W 5
Junction-to-case (top) thermal resistance RθJC(top) 66.2 °C/W 5
Junction-to-board thermal resistance RθJB 24.4 °C/W 5
Junction-to-top characterization parameter ΨJT 2.7 °C/W 5
Junction-to-board characterization parameter ΨJB 24.3 °C/W 5
Junction-to-case (bottom) thermal resistance RθJC(bot) 6.9 °C/W 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper • Use copper planes for device connections to IN, OUT, and GND pins to optimize thermal performance 23

CAD (KiCad official)

  • Symbol: TLV76701QWDRBRQ1
  • Footprint: Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm
  • 3D model: WSON-8-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tlv76701qwdrbrq1-etched.step / tlv76701qwdrbrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv76701qwdrbrq1.step / tlv76701qwdrbrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 54f04f3d1fecd248, retrieved 2026-11-05, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF