component

TLV76033DBZR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-3. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentpmictlv76033dbzr
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tlv76033dbzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tlv76033dbzr: specified limits as data (metadata.characteristics, 21 rows from the datasheet) · Ray
README.md tlv76033dbzr: specified limits as data (metadata.characteristics, 21 rows from the datasheet) · Ray
tlv76033dbzr-etched.fit.json tlv76033dbzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tlv76033dbzr-etched.glb tlv76033dbzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tlv76033dbzr-etched.step tlv76033dbzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tlv76033dbzr.glb Publish 0.1.0 · Ray
tlv76033dbzr.kicad_mod Publish 0.1.0 · Ray
tlv76033dbzr.kicad_sym Publish 0.1.0 · Ray
tlv76033dbzr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tlv76033dbzr.step Publish 0.1.0 · Ray

TLV76033DBZR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

TLV76033DBZR from Texas Instruments, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated 3.3 V output voltage, up to 100 mA. Requires a ceramic output capacitor greater than or equal to 0.1 µF for stability.
2 IN power_in Input voltage supply pin, accepts up to 30 V (absolute max 35 V). TI recommends a ceramic input capacitor greater than or equal to 0.1 µF at the input.
3 GND power_in Common ground reference for the device. Typical ground pin current is 2 mA (5 mA max) with no load.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-3
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • TLV76033DBZR
  • TLV76033DBZRDBZT

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage accuracy VOUT -4 4 % VIN = VOUT(NOM) + 1.5 V, 1 mA ≤ IOUT ≤ 100 mA 5
Output voltage accuracy over temperature VOUT -5 5 % VIN = VOUT(NOM) + 1.5 V, 1 mA ≤ IOUT ≤ 100 mA, −40°C ≤ TJ ≤ 125°C 5
Line regulation ΔV(ΔVIN) 10 30 mV VOUT(NOM) = 3.3 V, 5 V; VOUT(NOM) + 1.5 V ≤ VIN ≤ 30 V, IOUT = 1 mA, −40°C ≤ TJ ≤ 125°C 5
Load regulation ΔV(ΔIOUT) 20 45 mV VOUT(NOM) = 3.3 V, 5 V; VIN = VOUT(NOM) + 1.5 V, 10 mA ≤ IOUT ≤ 100 mA, −40°C ≤ TJ ≤ 125°C 5
Ground pin current IGND 2 5 mA VOUT(NOM) + 1.5 V ≤ VIN ≤ 30 V, no load, −40°C ≤ TJ ≤ 125°C 5
Dropout voltage VDO 0.7 0.9 V IOUT = 10 mA 5
Dropout voltage over temperature VDO 1 V IOUT = 10 mA, −40°C ≤ TJ ≤ 125°C 5
Dropout voltage VDO 0.9 1.1 V IOUT = 100 mA 5
Dropout voltage over temperature VDO 1.2 V IOUT = 100 mA, −40°C ≤ TJ ≤ 125°C 5
Input voltage (IN to GND) absolute maximum -0.3 35 V IN to GND 4
Junction temperature absolute maximum TJ -40 150 °C 4
Storage temperature Tstg -65 150 °C 4
Maximum input voltage (IN to GND) 30 V IN to GND 4
Output current (IOUT) IOUT 100 mA 4
Input and output capacitor (COUT) COUT 0.1 µF 4
Junction temperature (recommended operating) TJ -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 275.2 °C/W 4
Junction-to-case (top) thermal resistance RθJC(top) 92.8 °C/W 4
Junction-to-board thermal resistance RθJB 56.8 °C/W 4
Junction-to-top characterization parameter ψJT 2.9 °C/W 4
Junction-to-board characterization parameter ψJB 55.6 °C/W 4

CAD (KiCad official)

  • Symbol: TLV76033DBZR
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: tlv76033dbzr-etched.step / tlv76033dbzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv76033dbzr.step / tlv76033dbzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 44c2796e3f08970a, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF