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docs tlv75733pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tlv75733pdbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
README.md tlv75733pdbvr: specified limits as data (metadata.characteristics, 25 rows from the datasheet) · Ray
tlv75733pdbvr-etched.fit.json tlv75733pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tlv75733pdbvr-etched.glb tlv75733pdbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
tlv75733pdbvr-etched.step tlv75733pdbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
tlv75733pdbvr.glb Publish 0.1.0 · Ray
tlv75733pdbvr.kicad_mod Publish 0.1.0 · Ray
tlv75733pdbvr.kicad_sym Publish 0.1.0 · Ray
tlv75733pdbvr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tlv75733pdbvr.step Publish 0.1.0 · Ray

TLV75733PDBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TLV75733PDBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Unregulated input supply. Operating range 1.45 V to 5.5 V (absolute max 6 V). Requires a ceramic input capacitor ≥1 µF (effective ≥0.47 µF after derating) from IN to GND.
2 GND power_in Device ground return. Reference for VIN, VOUT and EN.
3 EN input Active-high enable input. Drive EN > VHI (1 V typ) to turn on the regulator; drive EN < VLO to place the LDO in shutdown (ISHDN ≈ 0.1 µA). Absolute max 6 V; recommended 0 V to 5.5 V. Do not float.
4 NC unconnected No internal connection. May be left floating or tied to GND for mechanical stability.
5 OUT power_out Regulated 3.3-V output (1% accuracy, 1 A max). Requires a ceramic output capacitor ≥1 µF (effective ≥0.47 µF after derating) from OUT to GND. Stable with 1 µF to 200 µF.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TLV75733PDBVR
  • TLV75733PDBVT
  • TLV75733PDBVRPDRVR
  • TLV75733PDBVRPDRVT

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN 1.45 5.5 V 4
Enable voltage VEN 0 5.5 V 4
Output current IOUT 0 1 A 4
Input capacitor CIN 1 µF Text: 1 µF or larger required at IN 4
Output capacitor COUT 1 200 µF 4
Junction temperature TJ -40 125 °C 4
Supply voltage VIN -0.3 6 V 4
Enable voltage VEN -0.3 6 V 4
Output voltage VOUT -0.3 V Maximum printed as VIN + 0.3 V or 6 V, whichever is smaller 4
Operating junction temperature range TJ -40 150 °C 4
Storage temperature Tstg -65 150 °C 4
Junction-to-ambient thermal resistance RθJA 231.1 °C/W DBV (SOT-23), 5 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 118.4 °C/W DBV (SOT-23), 5 pins 4
Junction-to-board thermal resistance RθJB 64.4 °C/W DBV (SOT-23), 5 pins 4
Input voltage VIN 1.45 5.5 V 5
Output accuracy -1 1 % –40°C ≤ TJ ≤ 85°C, VOUT ≥ 1 V 5
Output accuracy -1.5 1.5 % VOUT ≥ 1 V 5
Line regulation (ΔVOUT)ΔVIN 2 mV VOUT + 0.5 V ≤ VIN ≤ 5.5 V 5
Ground current IGND 25 31 µA TJ = 25°C 5
Ground current IGND 33 µA –40°C ≤ TJ ≤ +85°C 5
Ground current IGND 40 µA –40°C ≤ TJ ≤ +125°C 5
Shutdown current ISHDN 0.1 1 µA VEN ≤ 0.4 V, 1.45 V ≤ VIN ≤ 5.5 V, –40°C ≤ TJ ≤ +125°C 5
Dropout voltage (IOUT = 1 A, 3.3 V ≤ VOUT < 5.0 V) VDO 300 425 mV IOUT = 1 A, –40°C ≤ TJ ≤ +85°C; 3.3 V ≤ VOUT < 5.0 V 5
Dropout voltage (IOUT = 1 A, 3.3 V ≤ VOUT < 5.0 V) VDO 475 mV IOUT = 1 A, –40°C ≤ TJ ≤ +125°C; 3.3 V ≤ VOUT < 5.0 V 5
Undervoltage lockout VUVLO 1.21 1.3 1.44 V VIN rising 5

CAD (KiCad official)

  • Symbol: TLV75733PDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tlv75733pdbvr-etched.step / tlv75733pdbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv75733pdbvr.step / tlv75733pdbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 ec949967cbd904e1, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF