component

TLV75712PDRVR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tlv75712pdrvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers tlv75712pdrvr: viewers · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Initial commit: component/tlv75712pdrvr · Ray 4d ago
tlv75712pdrvr-etched.fit.json tlv75712pdrvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tlv75712pdrvr-etched.glb tlv75712pdrvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tlv75712pdrvr-etched.step tlv75712pdrvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tlv75712pdrvr.glb Publish 0.1.0 · Ray 4d ago
tlv75712pdrvr.kicad_mod Publish 0.1.0 · Ray 4d ago
tlv75712pdrvr.kicad_sym Publish 0.1.0 · Ray 4d ago
tlv75712pdrvr.lbr Publish 0.1.0 · Ray 4d ago
tlv75712pdrvr.step Publish 0.1.0 · Ray 4d ago

TLV75712PDRVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)

TLV75712PDRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Regulated output voltage pin; output voltage range 0.6V to 5.0V with capacitor ≥1µF to ground required.
2 NC unconnected No internal connection.
3 GND power_in Ground pin.
4 EN input Enable pin; drive greater than VHI to enable the regulator or less than VLO to place LDO into shutdown mode.
5 NC unconnected No internal connection.
6 IN input Input pin; input voltage range 1.45V to 5.5V with capacitor ≥1µF to ground required.
7 Thermal Pad passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6-EP(2x2)
Category Power Management (PMIC)
Pins 7

CAD (KiCad official)

  • Symbol: TLV75712PDRVR
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: tlv75712pdrvr-etched.step / tlv75712pdrvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv75712pdrvr.step / tlv75712pdrvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 7578ab4cef6f6b1f, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF