component
TLV75533PDYDR
Public Made by Adomby adom
TEXAS INSTRUMENTS Global Sourcing Parts, SOT-23-5. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV75533PDYDR
TEXAS INSTRUMENTS · Global Sourcing Parts · SOT-23-5
TLV75533PDYDR from TEXAS INSTRUMENTS, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply pin (1.45V to 5.5V operating range) that requires a 1µF or larger capacitor to ground. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Enable pin: drive greater than VHI to turn on the regulator, less than VLO to place the LDO into shutdown mode. |
| 4 | NC | unconnected | No internal connection. |
| 5 | OUT | power_out | Regulated output voltage pin that requires a 1µF or larger capacitor to ground. |
| Pad | Thermal pad | passive | Exposed thermal pad internally connected to GND; connect to a large-area ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TEXAS INSTRUMENTS |
| Package | SOT-23-5 |
| Category | Global Sourcing Parts |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output accuracy | VOUT | -1.5 | 1.5 | % | VOUT ≥ 1V, TJ = -40°C to 125°C | 5 | |
| Ground current | IGND | 14 | 25 | 31 | µA | TJ = 25°C, IOUT = 0mA | 5 |
| Ground current | IGND | 33 | µA | -40°C ≤ TJ ≤ +85°C, IOUT = 0mA | 5 | ||
| Ground current | IGND | 40 | µA | -40°C ≤ TJ ≤ +125°C, IOUT = 0mA | 5 | ||
| Shutdown current | ISHDN | 0.1 | 1 | µA | VEN ≤ 0.4V, 1.4V ≤ VIN ≤ 5.5V, -40°C ≤ TJ ≤ +125°C | 5 | |
| Output current limit | ICL | 560 | 720 | 865 | mA | VIN = VOUT + VDO(MAX) + 0.25V, VOUT = 0.9 x VOUT, 1.5V < VOUT ≤ 4.5V | 5 |
| Dropout voltage | VDO | 150 | 238 | mV | IOUT = 500mA, -40°C ≤ TJ ≤ +85°C, 3.3V ≤ VOUT < 5.0V, DYD package | 6 | |
| Dropout voltage | VDO | 258 | mV | IOUT = 500mA, -40°C ≤ TJ ≤ +125°C, 3.3V ≤ VOUT < 5.0V, DYD package | 6 | ||
| Undervoltage lockout | VUVLO | 1.21 | 1.3 | 1.44 | V | VIN rising | 6 |
| EN pin high voltage (enabled) | VHI | 1 | V | 6 | |||
| EN pin low voltage | VLO | 0.3 | V | 6 | |||
| Input voltage | VIN | 1.45 | 5.5 | V | 4 | ||
| Output voltage | VOUT | 0.6 | 5 | V | 4 | ||
| Enable voltage | VEN | 0 | 5.5 | V | 4 | ||
| Output current | IOUT | 0 | 500 | mA | 4 | ||
| Input capacitor | CIN | 1 | μF | 4 | |||
| Output capacitor | COUT | 1 | 200 | μF | 4 | ||
| Enable toggle frequency | fEN | 10 | kHz | 4 | |||
| Junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Supply voltage | VIN | -0.3 | 6 | V | 4 | ||
| Enable voltage | VEN | -0.3 | 6 | V | 4 | ||
| Output voltage | VOUT | -0.3 | 6 | V | VIN + 0.3 V or 6.0 V, whichever is smaller | 4 | |
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -1000 | 1000 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -500 | 500 | V | Charged-device model, JEDEC JESD22-C101 | 4 | |
| Junction-to-ambient thermal resistance (EVM) | RθJA | 60.3 | °C/W | DYD (SOT-23-5), EVM | 5 | ||
| Junction-to-top characterization parameter (EVM) | ψJT | 14.2 | °C/W | DYD (SOT-23-5), EVM | 5 | ||
| Junction-to-board characterization parameter (EVM) | ψJB | 35.9 | °C/W | DYD (SOT-23-5), EVM | 5 | ||
| Junction-to-ambient thermal resistance (JEDEC) | RθJA | 92.5 | °C/W | DYD (SOT-23-5), JEDEC | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 119.8 | °C/W | DYD (SOT-23-5), JEDEC | 5 | ||
| Junction-to-board thermal resistance | RθJB | 45.8 | °C/W | DYD (SOT-23-5), JEDEC | 5 | ||
| Junction-to-top characterization parameter (JEDEC) | ψJT | 16.7 | °C/W | DYD (SOT-23-5), JEDEC | 5 | ||
| Junction-to-board characterization parameter (JEDEC) | ψJB | 44.9 | °C/W | DYD (SOT-23-5), JEDEC | 5 | ||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 34.3 | °C/W | DYD (SOT-23-5), JEDEC | 5 | ||
| Load regulation | ΔVOUT/ΔIOUT | 0.06 | V/A | 0.1mA ≤ IOUT ≤ 500mA, DBV and DYD packages | 5 | ||
| Short-circuit current limit | ISC | 355 | mA | VOUT = 0V | 5 | ||
| PSRR | PSRR | 52 | dB | f = 1kHz, VIN = VOUT + 1V, IOUT = 50mA | 6 | ||
| PSRR | PSRR | 46 | dB | f = 100kHz, VIN = VOUT + 1V, IOUT = 50mA | 6 | ||
| UVLO hysteresis | VUVLO,HYST | 40 | mV | VIN falling | 6 | ||
| Startup time | tSTR | 550 | µs | 6 | |||
| Enable pin current | IEN | 10 | nA | EN = 5.5V | 6 | ||
| Thermal shutdown | TSD | 165 | °C | Shutdown, temperature increasing | 6 | ||
| Thermal shutdown reset | TSD | 155 | °C | Reset, temperature decreasing | 6 | ||
| Pulldown resistance | RPULLDOWN | 120 | Ω | VIN = 5.5V | 6 |
CAD (KiCad official)
- Symbol:
TLV75533PDYDR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tlv75533pdydr-etched.step/tlv75533pdydr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv75533pdydr.step/tlv75533pdydr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TEXAS INSTRUMENTS datasheet (51 pp, sha256
945e5ba0323addcd, retrieved 2026-10-22, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).