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docs tlv74312pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tlv74312pdbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
README.md tlv74312pdbvr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
tlv74312pdbvr-etched.fit.json tlv74312pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tlv74312pdbvr-etched.glb tlv74312pdbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
tlv74312pdbvr-etched.step tlv74312pdbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
tlv74312pdbvr.glb Publish 0.1.0 · Ray
tlv74312pdbvr.kicad_mod Publish 0.1.0 · Ray
tlv74312pdbvr.kicad_sym Publish 0.1.0 · Ray
tlv74312pdbvr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tlv74312pdbvr.step Publish 0.1.0 · Ray

TLV74312PDBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TLV74312PDBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply pin, 1.4 V to 5.5 V operating (6 V absolute max). A small ceramic capacitor (typically 1 µF) is recommended from this pin to GND.
2 GND power_in Ground reference pin for the regulator.
3 EN input Enable pin. Drive EN greater than V_EN(HI) to turn on the regulator; drive EN less than V_EN(LO) to put the LDO into shutdown mode. Enable range is 0 V to V_IN (V_EN absolute max = V_IN + 0.3 V).
4 NC unconnected No internal connection. May be left floating or tied to ground.
5 OUT power_out Regulated output voltage pin (1.2 V fixed for the TLV74312P), rated to 300 mA. For best transient response, use a small 1-µF ceramic capacitor from this pin to GND. Absolute maximum V_OUT is 3.6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TLV74312PDBVR
  • TLV74312PDBVRDBVT
  • TLV74312PDBVRDQNR
  • TLV74312PDBVRDQNT

CAD (KiCad official)

  • Symbol: TLV74312PDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tlv74312pdbvr-etched.step / tlv74312pdbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv74312pdbvr.step / tlv74312pdbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 231363715fb5480e, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF