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TLV74128PDBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TLV74128PDBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input pin; use a small capacitor from this pin to ground, with the input supply range given as 1.4 V to 5.5 V in the recommended operating conditions.
2 GND power_in Ground pin, which is electrically connected to the thermal pad.
3 EN input Enable pin; driving EN over 0.9 V turns on the regulator and driving EN below 0.4 V puts it into shutdown mode.
4 NC unconnected No internal connection.
5 OUT power_out Regulated output voltage pin; use a small 1-µF ceramic capacitor from this pin to ground for best transient response.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN -0.3 6 V 4
Output voltage VOUT -0.3 3.6 V 4
Enable voltage VEN -0.3 V max printed as VIN + 0.3 V 4
Junction temperature TJ -55 125 °C 4
Storage temperature Tstg -55 150 °C 4
Input voltage VIN 1.4 5.5 V 4
Enable range VEN 0 V max printed as VIN 4
Output current IOUT 0 150 mA 4
Input capacitor CIN 0 1 µF 4
Output capacitor COUT 1 100 µF 4
Operating junction temperature TJ -40 125 °C 4
Junction-to-ambient thermal resistance DBV (SOT-23, 5 pins) RθJA 249 °C/W 4
Junction-to-case (top) thermal resistance DBV RθJC(top) 172.7 °C/W 4
Junction-to-board thermal resistance DBV RθJB 76.7 °C/W 4
Junction-to-top characterization parameter DBV ψJT 49.7 °C/W 4
Junction-to-board characterization parameter DBV ψJB 75.8 °C/W 4
DC output accuracy -1 1 % VOUT ≥ 1.8 V, TJ = 25°C 5
DC output accuracy -1.5 1.5 % VOUT ≥ 1.2 V, -40°C ≤ TJ ≤ 125°C 5
Line regulation ΔVOUT(ΔVIN) 1 5 mV Maximum {VOUT(nom) + 0.5 V, VIN = 2 V} ≤ VIN ≤ 5.5 V 5
Load regulation ΔVOUT(ΔIOUT) 10 30 mV 0 mA ≤ IOUT ≤ 150 mA 5
Dropout voltage VDO 246 445 mV 2.5 V ≤ VOUT < 3 V, IOUT = 150 mA, TJ = -40°C to 85°C 5
Dropout voltage VDO 246 565 mV 2.5 V ≤ VOUT < 3 V, IOUT = 150 mA, TJ = -40°C to 125°C 5
Ground pin current IGND 50 75 µA IOUT = 0 mA 5
Shutdown current ISHUTDOWN 0.1 1 µA VEN ≤ 0.4 V, 2 V ≤ VIN ≤ 5.5 V, TJ = 25°C 5
Enable low (disabled) threshold VLO 0 0.4 V 6
Pulldown resistor RPULLDOWN 120 Ω VIN = 4 V 6

CAD (KiCad official)

  • Symbol: TLV74128PDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tlv74128pdbvr-etched.step / tlv74128pdbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv74128pdbvr.step / tlv74128pdbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 cb018de90b2c3433, retrieved 2026-11-05, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF