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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	tlv74033pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
viewers	tlv74033pdbvr: viewers · Ray	1mo ago
package.json	Publish 0.2.0 · Ray	1mo ago
page.json	tlv74033pdbvr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray	21h ago
README.md	tlv74033pdbvr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray	16d ago
tlv74033pdbvr-etched.fit.json	tlv74033pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
tlv74033pdbvr-etched.glb	tlv74033pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
tlv74033pdbvr-etched.step	tlv74033pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
tlv74033pdbvr.glb	Publish 0.1.0 · Ray	1mo ago
tlv74033pdbvr.kicad_mod	Publish 0.1.0 · Ray	1mo ago
tlv74033pdbvr.kicad_sym	Publish 0.1.0 · Ray	1mo ago
tlv74033pdbvr.lbr	Publish 0.1.0 · Ray	1mo ago
tlv74033pdbvr.step	Publish 0.1.0 · Ray	1mo ago

TLV74033PDBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TLV74033PDBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN	power_in	Input supply pin, 1.4V to 5.5V. Requires a 1µF or larger ceramic input capacitor placed close to the device for best transient response and low input impedance.
2	GND	power_in	Ground reference pin. Must be connected to the board ground plane.
3	EN	input	Active-high enable input. Drive high (≥1.0V) to enable the regulator; drive low (≤0.4V) to disable. Do not float - tie to IN if unused. Enable pin current typically 10nA.
4	NC	unconnected	No internal connection. Connect to ground for best thermal performance or leave floating.
5	OUT	power_out	Regulated 3.3V output, up to 300mA. Requires a 1µF or greater ceramic output capacitor (0.5µF minimum effective capacitance) to ground for stability, placed as close to the pin as possible.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOT-23-5
Category	PMIC
Pins	5

Ordering variants

Same part, different packaging or reel option.

TLV74033PDBVR
TLV74033PDBVRDBVT
TLV74033PDBVRDQNR
TLV74033PDBVRDQNT

CAD (KiCad official)

Symbol: TLV74033PDBVR
Footprint: Package_TO_SOT_SMD:SOT-23-5
3D model: SOT-23-5 (KiCad packages3D, STEP)
3D model files: tlv74033pdbvr-etched.step / tlv74033pdbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv74033pdbvr.step / tlv74033pdbvr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tlv74033pdbvr.step`	85 KB	You want the bare part, or you mark your own boards.
`tlv74033pdbvr-etched.step`	2.1 MB	You want the part with `TLV74033PDBVR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 538 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (35 pp, sha256 647bd73d02c1ee3e, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF