component
TLV73328PQDRVRQ1
Public Made by Adomby adom
Texas Instruments Linear Voltage Regulators (LDO), WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV73328PQDRVRQ1
Texas Instruments · Linear Voltage Regulators (LDO) · WSON-6-EP(2x2)
TLV73328PQDRVRQ1 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output voltage pin; for best transient response use a small 1-µF ceramic capacitor from this pin to ground. |
| 2 | NC | unconnected | No internal connection. |
| 3 | GND | power_in | Ground pin. |
| 4 | EN | input | Enable pin; drive EN greater than VEN(HI) to turn on the regulator and less than VEN(LO) to put the LDO into shutdown mode. |
| 5 | NC | unconnected | No internal connection. |
| 6 | IN | power_in | Input pin (1.4 V to 5.5 V recommended operating range); a small capacitor from this pin to ground is recommended. |
| 7 | GND | power_in | Thermal pad electrically connected to the GND node; connect to the GND plane for improved thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Supply Chip |
| Pins | 7 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 1.4 | 5.5 | V | 6 | ||
| DC output accuracy | -1 | 1 | % | TJ = 25°C | 6 | ||
| DC output accuracy | -1.4 | 1.4 | % | -40°C ≤ TJ ≤ 150°C | 6 | ||
| Undervoltage lockout, VIN rising | UVLO | 1.3 | 1.4 | V | VIN rising | 6 | |
| Dropout voltage | VDO | 290 | mV | VOUT = 0.98 × VOUT(nom), IOUT = 300 mA, 2.5 V ≤ VOUT < 3.3 V, -40°C ≤ TJ ≤ 125°C | 6 | ||
| Dropout voltage | VDO | 330 | mV | VOUT = 0.98 × VOUT(nom), IOUT = 300 mA, 2.5 V ≤ VOUT < 3.3 V, -40°C ≤ TJ ≤ 150°C | 6 | ||
| Ground pin current | IGND | 34 | 62 | µA | IOUT = 0 mA, -40°C ≤ TJ ≤ 125°C | 6 | |
| Ground pin current | IGND | 78 | µA | IOUT = 0 mA, -40°C ≤ TJ ≤ 150°C | 6 | ||
| Shutdown current | ISHDN | 0.1 | 1 | µA | VEN ≤ 0.35 V, 2.0 V ≤ VIN ≤ 5.5 V, TJ = 25°C | 6 | |
| EN pin high voltage (enabled) | VEN(HI) | 0.9 | V | 6 | |||
| EN pin low voltage (disabled) | VEN(LO) | 0.35 | V | 6 | |||
| Output current limit | ILIM | 360 | 700 | mA | 6 | ||
| Thermal shutdown, temperature increasing | Tsd | 160 | °C | Shutdown, temperature increasing | 7 | ||
| Thermal shutdown, temperature decreasing | Tsd | 140 | °C | Reset, temperature decreasing | 7 | ||
| Input voltage range | VIN | 1.4 | 5.5 | V | 5 | ||
| Output range | VOUT | 1 | 3.3 | V | 5 | ||
| Output current | IOUT | 0 | 300 | mA | 5 | ||
| Enable range | VEN | 0 | V | max = VIN | 5 | ||
| Junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Ambient temperature | TA | -40 | 125 | °C | 5 | ||
| Input voltage | VIN | -0.3 | 6 | V | 5 | ||
| Enable voltage | VEN | -0.3 | V | max = VIN + 0.3 V | 5 | ||
| Output voltage | VOUT | -0.3 | 3.6 | V | 5 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 92.5 | °C/W | DRV (WSON), 6 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 123.9 | °C/W | DRV (WSON), 6 pins | 5 | ||
| Junction-to-board thermal resistance | RθJB | 61.9 | °C/W | DRV (WSON), 6 pins | 5 | ||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 30.9 | °C/W | DRV (WSON), 6 pins | 5 | ||
| Line regulation | ΔVO(ΔVI) | 1 | mV | ΔVI = VOUT(nom) + 0.5 V or 2.0 V (whichever is greater) to 5.5 V | 6 | ||
| Load regulation | ΔVO(ΔIO) | 25 | mV | ΔIO = 1 mA to 300 mA | 6 | ||
| Output noise voltage | Vn | 120 | µVRMS | BW = 10 Hz to 100 kHz, VOUT = 1.8 V, IOUT = 10 mA | 6 | ||
| Pulldown resistor | 120 | Ω | VIN = 2.3 V | 6 |
CAD (KiCad official)
- Symbol:
TLV73328PQDRVRQ1 - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tlv73328pqdrvrq1-etched.step/tlv73328pqdrvrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv73328pqdrvrq1.step/tlv73328pqdrvrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
9c366ae4d9e9b906, retrieved 2026-10-22, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).