component
TLV73315PQDBVRQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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TLV73315PQDBVRQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TLV73315PQDBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input pin with a recommended input range of 1.4 V to 5.5 V; a small capacitor is recommended from this pin to ground, and the absolute maximum VIN is 6.0 V. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Enable pin with a recommended range of 0 V to VIN; drive EN above VEN(HI) to turn the regulator on and below VEN(LO) to put the LDO into shutdown mode. |
| 4 | NC | unconnected | No internal connection. |
| 5 | OUT | output | Regulated output voltage pin with an output range of 1.0 V to 3.3 V; for best transient response, use a small 1-µF ceramic capacitor from this pin to ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 1.4 | 5.5 | V | 6 | ||
| DC output accuracy | VOUT | -1 | 1 | % | TJ = 25°C | 6 | |
| DC output accuracy | VOUT | -1.4 | 1.4 | % | –40°C ≤ TJ ≤ 150°C | 6 | |
| Undervoltage lockout, VIN rising | UVLO | 1.3 | 1.4 | V | VIN rising | 6 | |
| Dropout voltage, VOUT = 0.98 × VOUT(nom) | VDO | 290 | mV | VOUT = 0.98 × VOUT(nom), IOUT = 300 mA; 2.5 V ≤ VOUT < 3.3 V, –40°C ≤ TJ ≤ 125°C | 6 | ||
| Dropout voltage, VOUT = 0.98 × VOUT(nom) | VDO | 330 | mV | VOUT = 0.98 × VOUT(nom), IOUT = 300 mA; 2.5 V ≤ VOUT < 3.3 V, –40°C ≤ TJ ≤ 150°C | 6 | ||
| Ground pin current | IGND | 34 | 62 | µA | IOUT = 0 mA, –40°C ≤ TJ ≤ 125°C | 6 | |
| Ground pin current | IGND | 78 | µA | IOUT = 0 mA, –40°C ≤ TJ ≤ 150°C | 6 | ||
| Shutdown current | ISHDN | 0.1 | 1 | µA | VEN ≤ 0.35 V, 2.0 V ≤ VIN ≤ 5.5 V, TJ = 25°C | 6 | |
| EN pin high voltage (enabled) | VEN(HI) | 0.9 | V | 6 | |||
| EN pin low voltage (disabled) | VEN(LO) | 0.35 | V | 6 | |||
| Output current limit | ILIM | 360 | 700 | mA | 6 | ||
| Input voltage | VIN | -0.3 | 6 | V | with respect to GND | 5 | |
| EN voltage | VEN | -0.3 | V | with respect to GND; max = VIN + 0.3 V | 5 | ||
| Output voltage | VOUT | -0.3 | 3.6 | V | with respect to GND | 5 | |
| Operating junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Input voltage range | VIN | 1.4 | 5.5 | V | 5 | ||
| Output voltage range | VOUT | 1 | 3.3 | V | 5 | ||
| Output current | IOUT | 0 | 300 | mA | 5 | ||
| Enable range | VEN | 0 | V | max = VIN | 5 | ||
| Junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Ambient temperature | TA | -40 | 125 | °C | 5 | ||
| Junction-to-ambient thermal resistance (DBV, SOT-23) | RθJA | 198.3 | °C/W | DBV (SOT-23), 5 pins | 5 | ||
| Junction-to-case (top) thermal resistance (DBV, SOT-23) | RθJC(top) | 118.4 | °C/W | DBV (SOT-23), 5 pins | 5 | ||
| Junction-to-board thermal resistance (DBV, SOT-23) | RθJB | 65.8 | °C/W | DBV (SOT-23), 5 pins | 5 | ||
| Junction-to-top characterization parameter (DBV, SOT-23) | ψJT | 42.4 | °C/W | DBV (SOT-23), 5 pins | 5 | ||
| Junction-to-board characterization parameter (DBV, SOT-23) | ψJB | 65.5 | °C/W | DBV (SOT-23), 5 pins | 5 |
CAD (KiCad official)
- Symbol:
TLV73315PQDBVRQ1 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tlv73315pqdbvrq1-etched.step/tlv73315pqdbvrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv73315pqdbvrq1.step/tlv73315pqdbvrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
2828394ba8fc4cbb, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).