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TLV73310PDBVR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tlv73310pdbvrfactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tlv73310pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
viewers tlv73310pdbvr: viewers · Ray 12d ago
package.json Publish 0.1.0 · Ray 12d ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 10d ago
README.md Initial commit: component/tlv73310pdbvr · Ray 12d ago
tlv73310pdbvr-etched.fit.json tlv73310pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
tlv73310pdbvr-etched.glb tlv73310pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
tlv73310pdbvr-etched.step tlv73310pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
tlv73310pdbvr.glb Publish 0.1.0 · Ray 12d ago
tlv73310pdbvr.kicad_mod Publish 0.1.0 · Ray 12d ago
tlv73310pdbvr.kicad_sym Publish 0.1.0 · Ray 12d ago
tlv73310pdbvr.lbr Publish 0.1.0 · Ray 12d ago
tlv73310pdbvr.step Publish 0.1.0 · Ray 12d ago

TLV73310PDBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TLV73310PDBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply voltage pin; accepts 1.4 V to 5.5 V with small 0.1 µF to 1 µF capacitor recommended to ground for input filtering.
2 GND power_in Ground reference pin; electrically connected to thermal pad for improved thermal performance.
3 EN input Enable control input pin; drive above VEN(HI) = 0.9 V to enable regulator or below VEN(LO) = 0.35 V to enter shutdown mode.
4 NC unconnected No internal connection pin; leave unconnected.
5 OUT power_out Regulated 1.0 V output voltage pin delivering 0 to 300 mA with 1 µF ceramic capacitor recommended to ground for optimal transient response.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TLV73310PDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tlv73310pdbvr-etched.step / tlv73310pdbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv73310pdbvr.step / tlv73310pdbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 d3273333e022aa40, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF