component
TLV7111225DSER
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6(1.5x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLV7111225DSER
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6(1.5x1.5)
TLV7111225DSER from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN1 | input | Driving EN1 over 0.9V turns on regulator 1, and driving EN1 below 0.4V puts regulator 1 into shutdown mode. |
| 2 | IN | power_in | Input pin; a small capacitor is needed from this pin to ground to assure stability. |
| 3 | EN2 | input | Driving EN2 over 0.9V turns on regulator 2, and driving EN2 below 0.4V puts regulator 2 into shutdown mode. |
| 4 | GND | power_in | Ground pin. |
| 5 | OUT2 | power_out | Regulated output voltage pin for channel 2; a small 1 µF ceramic capacitor is needed from this pin to ground to assure stability. |
| 6 | OUT1 | power_out | Regulated output voltage pin for channel 1; a small 1 µF ceramic capacitor is needed from this pin to ground to assure stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(1.5x1.5) |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 2 | 5.5 | V | 3 | ||
| Output voltage range | VO | 1.2 | 4.8 | V | 3 | ||
| DC output accuracy | VOUT | -2 | 2 | % | -40°C ≤ TJ ≤ +125°C | 3 | |
| Line regulation | ΔVO/ΔVIN | 1 | 5 | mV | VOUT(NOM) + 0.5V ≤ VIN ≤ 5.5V | 3 | |
| Load regulation | ΔVO/ΔIOUT | 5 | 15 | mV | 0mA ≤ IOUT ≤ 200mA | 3 | |
| Dropout voltage | VDO | 175 | 250 | mV | VIN = 0.98V × VOUT(NOM), IOUT = 200mA, 2.4V ≤ VOUT < 2.8V | 3 | |
| Output current limit | ICL | 220 | 350 | 550 | mA | VOUT = 0.9V × VOUT(NOM) | 3 |
| Enable high (enabled) | VHI | 0.9 | V | Printed as 0.9 VIN | 3 | ||
| Enable low (shutdown) | VLO | 0 | 0.4 | V | 3 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 3 | ||
| Input voltage IN (absolute maximum) | IN | -0.3 | 6 | V | At TJ = -40°C to +125°C (unless otherwise noted); voltages with respect to ground | 2 | |
| Enable voltage EN (absolute maximum) | EN | -0.3 | V | Maximum is VIN + 0.3; voltages with respect to ground | 2 | ||
| Output voltage OUT (absolute maximum) | OUT | -0.3 | 6 | V | At TJ = -40°C to +125°C (unless otherwise noted); voltages with respect to ground | 2 | |
| Operating junction temperature (absolute maximum) | TJ | -55 | 150 | °C | 2 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 2 | ||
| Electrostatic discharge, human body model | 2 | kV | HBM QSS 009-105 (JESD22-A114A) | 2 | |||
| Electrostatic discharge, charged device model | 500 | V | CDM QSS 009-147 (JESD22-C101B.01) | 2 | |||
| Junction-to-top characterization parameter | yJT | 6 | °C/W | DSE, 6 pins | 2 | ||
| Junction-to-ambient thermal resistance (EVM) | RθJA | 170 | °C/W | TLV710 EVM board, DSE (SON-6) package | 19 |
CAD (KiCad official)
- Symbol:
TLV7111225DSER - Footprint:
Package_SON:WSON-6_1.5x1.5mm_P0.5mm - 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
- 3D model files:
tlv7111225dser-etched.step/tlv7111225dser-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv7111225dser.step/tlv7111225dser.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
3ff305466ac15197, retrieved 2026-11-06, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLV7111225DSER
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6(1.5x1.5)
TLV7111225DSER from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN1 | input | Driving EN1 over 0.9V turns on regulator 1, and driving EN1 below 0.4V puts regulator 1 into shutdown mode. |
| 2 | IN | power_in | Input pin; a small capacitor is needed from this pin to ground to assure stability. |
| 3 | EN2 | input | Driving EN2 over 0.9V turns on regulator 2, and driving EN2 below 0.4V puts regulator 2 into shutdown mode. |
| 4 | GND | power_in | Ground pin. |
| 5 | OUT2 | power_out | Regulated output voltage pin for channel 2; a small 1 µF ceramic capacitor is needed from this pin to ground to assure stability. |
| 6 | OUT1 | power_out | Regulated output voltage pin for channel 1; a small 1 µF ceramic capacitor is needed from this pin to ground to assure stability. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(1.5x1.5) |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 2 | | 5.5 | V | | 3 |
| Output voltage range | VO | 1.2 | | 4.8 | V | | 3 |
| DC output accuracy | VOUT | -2 | | 2 | % | -40°C ≤ TJ ≤ +125°C | 3 |
| Line regulation | ΔVO/ΔVIN | | 1 | 5 | mV | VOUT(NOM) + 0.5V ≤ VIN ≤ 5.5V | 3 |
| Load regulation | ΔVO/ΔIOUT | | 5 | 15 | mV | 0mA ≤ IOUT ≤ 200mA | 3 |
| Dropout voltage | VDO | | 175 | 250 | mV | VIN = 0.98V × VOUT(NOM), IOUT = 200mA, 2.4V ≤ VOUT < 2.8V | 3 |
| Output current limit | ICL | 220 | 350 | 550 | mA | VOUT = 0.9V × VOUT(NOM) | 3 |
| Enable high (enabled) | VHI | 0.9 | | | V | Printed as 0.9 VIN | 3 |
| Enable low (shutdown) | VLO | 0 | | 0.4 | V | | 3 |
| Operating junction temperature | TJ | -40 | | 125 | °C | | 3 |
| Input voltage IN (absolute maximum) | IN | -0.3 | | 6 | V | At TJ = -40°C to +125°C (unless otherwise noted); voltages with respect to ground | 2 |
| Enable voltage EN (absolute maximum) | EN | -0.3 | | | V | Maximum is VIN + 0.3; voltages with respect to ground | 2 |
| Output voltage OUT (absolute maximum) | OUT | -0.3 | | 6 | V | At TJ = -40°C to +125°C (unless otherwise noted); voltages with respect to ground | 2 |
| Operating junction temperature (absolute maximum) | TJ | -55 | | 150 | °C | | 2 |
| Storage temperature | Tstg | -55 | | 150 | °C | | 2 |
| Electrostatic discharge, human body model | | | | 2 | kV | HBM QSS 009-105 (JESD22-A114A) | 2 |
| Electrostatic discharge, charged device model | | | | 500 | V | CDM QSS 009-147 (JESD22-C101B.01) | 2 |
| Junction-to-top characterization parameter | yJT | | 6 | | °C/W | DSE, 6 pins | 2 |
| Junction-to-ambient thermal resistance (EVM) | RθJA | | 170 | | °C/W | TLV710 EVM board, DSE (SON-6) package | 19 |
## CAD (KiCad official)
- Symbol: `TLV7111225DSER`
- Footprint: `Package_SON:WSON-6_1.5x1.5mm_P0.5mm`
- 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
- 3D model files: `tlv7111225dser-etched.step` / `tlv7111225dser-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv7111225dser.step` / `tlv7111225dser.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlv711.pdf) (36 pp, sha256 `3ff305466ac15197`, retrieved 2026-11-06, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tlv7111225dser-datasheet.pdf)