main
History Download
Ray tlv7044rter: specified limits as data (metadata.characteristics, 23 rows from the datasheet) 3f49431 13d ago

TLV7044RTER

Texas Instruments · Comparators · WQFN-16(3x3)

TLV7044RTER from Texas Instruments, in a WQFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 +IN A input Noninverting input for channel A; the input common-mode range extends from VEE - 0.1 V to VCC + 0.1 V.
2 VCC power_in Positive (highest) supply; VS = VCC - VEE must be within 1.6 V to 6.5 V (1.2 V minimum for the S and L options), with an absolute maximum of 7 V.
3 NC unconnected No internal connection.
4 +IN B input Noninverting input for channel B; if the input swings 0.3 V below VEE it must be current-limited to 10 mA or less.
5 -IN B input Inverting input for channel B; inputs are diode-clamped to VEE and the absolute input range is VEE - 0.3 V to 7 V.
6 OUT B output Open-drain output for channel B (TLV704x), which can be pulled up to an external source up to 6.5 V independent of the supply voltage; absolute maximum is VEE - 0.3 V to 7 V.
7 OUT C output Open-drain output for channel C (TLV704x), which can be pulled up to an external source up to 6.5 V independent of the supply voltage; absolute maximum is VEE - 0.3 V to 7 V.
8 -IN C input Inverting input for channel C; inputs are diode-clamped to VEE and the absolute input range is VEE - 0.3 V to 7 V.
9 +IN C input Noninverting input for channel C; if the input swings 0.3 V below VEE it must be current-limited to 10 mA or less.
10 NC unconnected No internal connection.
11 VEE power_in Negative (lowest) supply or ground for single-supply operation.
12 +IN D input Noninverting input for channel D; if the input swings 0.3 V below VEE it must be current-limited to 10 mA or less.
13 -IN D input Inverting input for channel D; inputs are diode-clamped to VEE and the absolute input range is VEE - 0.3 V to 7 V.
14 OUT D output Open-drain output for channel D (TLV704x), which can be pulled up to an external source up to 6.5 V independent of the supply voltage; absolute maximum is VEE - 0.3 V to 7 V.
15 OUT A output Open-drain output for channel A (TLV704x), which can be pulled up to an external source up to 6.5 V independent of the supply voltage; absolute maximum is VEE - 0.3 V to 7 V.
16 -IN A input Inverting input for channel A; inputs are diode-clamped to VEE and the absolute input range is VEE - 0.3 V to 7 V.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16(3x3)
Category Amplifiers/Comparators
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VS = VCC - VEE (absolute maximum) VS -0.3 7 V 6
Input pins (IN+, IN-) (absolute maximum) 7 V 6
Current into input pins (IN+, IN-) -10 10 mA 6
Output (OUT) (TLV704x) (absolute maximum) 7 V 6
Output short-circuit duration 10 s 6
Junction temperature TJ 150 °C 6
Storage temperature Tstg -65 150 °C 6
Supply voltage VS = VCC - VEE (recommended) VS 1.6 6.5 V 6
Ambient temperature TA -40 125 °C 6
Input offset voltage VIO -8 0.1 8 mV VS = 1.8V and 5V, VCM = VS / 2 10
Hysteresis VHYS 3 10 25 mV VS = 1.8V and 5V, VCM = VS / 2 10
Output voltage low VOL 250 350 mV VS = 5V, VEE = 0V, IO = 3mA 10
Supply current / channel ICC 315 750 nA VS = 1.8V, no load, VID = –0.1V (Output Low) 10
Open-drain output leakage current (TLV7044 only) ILKG 100 pA VS = 5V, VID = +0.1V (output high), VPULLUP = VCC 10
Common-mode rejection ratio CMRR 73 dB VEE < VCM < VCC, VS = 5V 10
Power supply rejection ratio PSRR 77 dB VS = 1.8V to 5V, VCM = VS / 2 10
Power-up time tON 400 µs During power on, VCC must exceed 1.6V for tON before the output reflects the input. 10
Junction-to-ambient thermal resistance (RTE/QFN) RθJA 65.4 °C/W 7
Junction-to-case (top) thermal resistance (RTE/QFN) RθJC(top) 70.2 °C/W 7
Junction-to-board thermal resistance (RTE/QFN) RθJB 40.5 °C/W 7
Junction-to-top characterization parameter (RTE/QFN) ΨJT 5.6 °C/W 7
Junction-to-board characterization parameter (RTE/QFN) ΨJB 40.5 °C/W 7
Junction-to-case (bottom) thermal resistance (RTE/QFN) RθJC(bot) 24.1 °C/W 7

CAD (KiCad official)

  • Symbol: TLV7044RTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16(3x3) (KiCad packages3D, STEP)
  • 3D model files: tlv7044rter-etched.step / tlv7044rter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv7044rter.step / tlv7044rter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (69 pp, sha256 fc6532c9b7e645c9, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF