component
TLV7042QDGKRQ1
Public Made by Adomby adom
Texas Instruments Comparators, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 21d ago |
| viewers | 21d ago |
| package.json | 21d ago |
| page.json | 14d ago |
| README.md | 14d ago |
| tlv7042qdgkrq1-etched.glb | 21d ago |
| tlv7042qdgkrq1-etched.step | 21d ago |
| tlv7042qdgkrq1-hero.glb | 20d ago |
| tlv7042qdgkrq1-hero.overlay.json | 21d ago |
| tlv7042qdgkrq1.glb | 21d ago |
| tlv7042qdgkrq1.kicad_mod | 21d ago |
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| tlv7042qdgkrq1.step | 21d ago |
TLV7042QDGKRQ1
Texas Instruments · Comparators · VSSOP-8
TLV7042QDGKRQ1 from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Channel A output; open-drain on the TLV704x-Q1 variant, so it can be pulled up above VCC, with output voltage limited to VEE - 0.3 V to 7 V. |
| 2 | INA- | input | Inverting input of channel A; input terminals are diode-clamped to VEE, and signals that swing 0.3 V below VEE must be current-limited to 10 mA or less. |
| 3 | INA+ | input | Noninverting input of channel A; input voltage range is VEE - 0.1 V to VCC + 0.1 V. |
| 4 | VEE | power_in | Negative (lowest) supply or ground for single-supply operation; supply voltage VS = VCC - VEE is 1.6 V to 6.5 V recommended (7 V absolute maximum). |
| 5 | INB+ | input | Noninverting input of channel B; input voltage range is VEE - 0.1 V to VCC + 0.1 V. |
| 6 | INB- | input | Inverting input of channel B; input terminals are diode-clamped to VEE, and signals that swing 0.3 V below VEE must be current-limited to 10 mA or less. |
| 7 | OUTB | output | Channel B output; open-drain on the TLV704x-Q1 variant, so it can be pulled up above VCC, with output voltage limited to VEE - 0.3 V to 7 V. |
| 8 | VCC | power_in | Positive (highest) supply; supply voltage VS = VCC - VEE is 1.6 V to 6.5 V recommended (7 V absolute maximum). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VIO | -8 | 0.1 | 8 | mV | VS = 1.8 V and 5 V, VCM = VS / 2 | 9 |
| Hysteresis | VHYS | 3 | 10 | 25 | mV | VS = 1.8 V and 5 V, VCM = VS / 2 | 9 |
| Output voltage low | VOL | 250 | 350 | mV | VS = 5 V, VEE = 0 V, IO = 3 mA | 9 | |
| Supply current / channel | ICC | 315 | 750 | nA | VS = 1.8 V, no load, VID = –0.1 V (Output Low) | 9 | |
| Supply voltage (recommended) | VS | 1.6 | 6.5 | V | VS = VCC – VEE | 6 | |
| Ambient temperature | TA | -40 | 125 | °C | 6 | ||
| Supply voltage (absolute maximum) | VS | -0.3 | 7 | V | VS = VCC – VEE | 6 | |
| Output (open-drain) voltage | OUT | 7 | V | Output (OUT) (open-drain); lower limit printed as VEE – 0.3 V | 6 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| Electrostatic discharge, human-body model | V(ESD) HBM | -2000 | 2000 | V | Human-body model (HBM), per AEC Q100-002 | 6 | |
| Electrostatic discharge, charged-device model | V(ESD) CDM | -1000 | 1000 | V | Charged-device model (CDM), per AEC Q100-011 | 6 | |
| Junction-to-ambient thermal resistance (DGK) | RθJA | 211.7 | °C/W | DGK (VSSOP) 8 pins | 7 | ||
| Junction-to-case (top) thermal resistance (DGK) | RθJC(top) | 96.1 | °C/W | DGK (VSSOP) 8 pins | 7 | ||
| Junction-to-board thermal resistance (DGK) | RθJB | 133.5 | °C/W | DGK (VSSOP) 8 pins | 7 | ||
| Junction-to-top characterization parameter (DGK) | ΨJT | 28.3 | °C/W | DGK (VSSOP) 8 pins | 7 | ||
| Junction-to-board characterization parameter (DGK) | ΨJB | 131.7 | °C/W | DGK (VSSOP) 8 pins | 7 |
CAD (KiCad official)
- Symbol:
TLV7042QDGKRQ1 - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
tlv7042qdgkrq1-etched.step/tlv7042qdgkrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv7042qdgkrq1.step/tlv7042qdgkrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (49 pp, sha256
cad21db0b2048ae3, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).