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TLV70030QDCKRQ1

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Texas Instruments Linear Voltage Regulators (LDO), SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV70030QDCKRQ1

Texas Instruments · Linear Voltage Regulators (LDO) · SC-70-5

TLV70030QDCKRQ1 from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply pin (2 V to 5.5 V recommended); a 1-µF ceramic capacitor to ground is recommended for stability and good transient performance.
2 GND power_in Ground pin.
3 EN input Enable pin: driving EN over 0.9 V turns on the regulator, driving it below 0.4 V puts it into shutdown and reduces operating current to 1 µA nominal.
4 NC unconnected No internal connection; this pin can be tied to ground to improve thermal dissipation.
5 OUT power_out Regulated output voltage pin (3 V for TLV70030-Q1); a 1-µF ceramic capacitor to ground is needed for stability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SC-70-5
Category Power Supply Chip
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC output accuracy (VOUT ≥ 1 V) VOUT -2 2 % -40°C ≤ TA ≤ 125°C, VOUT ≥ 1 V 4
Line regulation ΔVO/ΔVIN 1 5 mV VOUT(NOM) + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 10 mA 4
Load regulation ΔVO/ΔIOUT 15 mV 0 mA ≤ IOUT ≤ 200 mA, TLV70030-Q1 4
Dropout voltage VDO 175 250 mV VIN = 0.98 × VOUT(NOM), IOUT = 200 mA 4
Output current limit ICL 220 350 550 mA VOUT = 0.9 × VOUT(NOM) 4
Ground pin current IGND 31 55 μA IOUT = 0 mA 4
Ground pin current IGND 270 μA IOUT = 200 mA, VIN = VOUT + 0.5 V 4
Ground pin current (shutdown) ISHDN 1 2.5 μA VEN ≤ 0.4 V, 2 V ≤ VIN ≤ 4.5 V 4
Enable pin high (enabled) VEN(HI) 0.9 V 4
Enable pin low (disabled) VEN(LO) 0 0.4 V 4
Enable pin current IEN 0.04 0.5 μA VEN = 5.5 V, IOUT = 10 μA 4
Power-supply rejection ratio PSRR 68 dB VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA, f = 1 kHz 4
Output noise voltage VN 48 μVRMS BW = 100 Hz to 100 kHz, VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA 4
Startup time tSTR 100 μs COUT = 1 μF, IOUT = 200 mA 4
Undervoltage lockout UVLO 1.9 V VIN rising 4
Thermal shutdown temperature (shutdown) TSD 160 °C Shutdown, temperature increasing 5
Thermal shutdown temperature (reset) TSD 140 °C Reset, temperature decreasing 5
Input voltage VIN -0.3 6 V TA = -40°C to 125°C, with respect to GND 3
Enable voltage VEN -0.3 6 V TA = -40°C to 125°C, with respect to GND 3
Output voltage VOUT -0.3 6 V TA = -40°C to 125°C, with respect to GND 3
Operating junction temperature TJ -40 150 °C 3
Storage temperature Tstg -55 150 °C 3
ESD HBM V(ESD) -2000 2000 V Human-body model, per AEC Q100-002 3
ESD CDM V(ESD) -750 750 V Charged-device model, per AEC Q100-011 3
Input supply-voltage range VIN 2 5.5 V 4
Output voltage VOUT 1.2 4.8 V 4
Output current IOUT 0 200 mA 4
Voltage on EN pin VEN 0 V max = VIN 4
Operating ambient temperature TA -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 307.6 °C/W DCK, 5 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 79.1 °C/W DCK, 5 pins 4
Junction-to-board thermal resistance RθJB 93.7 °C/W DCK, 5 pins 4
Junction-to-top characterization parameter ψJT 1.3 °C/W DCK, 5 pins 4
Junction-to-board characterization parameter ψJB 92.8 °C/W DCK, 5 pins 4

CAD (KiCad official)

  • Symbol: TLV70030QDCKRQ1
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: tlv70030qdckrq1-etched.step / tlv70030qdckrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv70030qdckrq1.step / tlv70030qdckrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 4d5f2a8855428d83, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF