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TLV6700QDDCRQ1

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Texas Instruments Comparators, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TLV6700QDDCRQ1

Texas Instruments · Comparators · SOT-23-6

TLV6700QDDCRQ1 from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output INA+ comparator open-drain output, driven low when INA+ is below (VITP - VHYS) and high when it returns above VITP; rated to 18 V.
2 GND power_in Ground.
3 INA+ input Connects to the monitored voltage through an external resistor divider; OUTA is driven low when it drops below (VITP - VHYS), with a 0 to 6.5 V recommended input range.
4 INB- input Connects to the monitored voltage through an external resistor divider; OUTB is driven low when it exceeds VITP, with a 0 to 6.5 V recommended input range.
5 VDD power_in Supply voltage input for 1.8 V to 18 V, with a 0.1-µF ceramic capacitor recommended close to the pin.
6 OUTB output INB- comparator open-drain output, driven low when INB- exceeds VITP and high when it returns below (VITP - VHYS); rated to 18 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Operational Amplifier/Comparator
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Positive-going input threshold voltage VIT+ 398 400 402.5 mV VDD = 1.8V and 18 V, TJ = 25°C 6
Positive-going input threshold voltage VIT+ 396 404 mV VDD = 1.8V and 18 V, TJ = -40°C to 125°C 6
Negative-going input threshold voltage VIT- 391.6 394.5 397.5 mV VDD = 1.8V and 18 V, TJ = 25°C 6
Negative-going input threshold voltage VIT- 387 400 mV VDD = 1.8V and 18 V, TJ = -40°C to 125°C 6
Hysteresis voltage Vhys 5.5 12 mV hys = VIT+, VIT- 6
Input current INA+ I(INA+) -25 1 25 nA VDD = 1.8 V and 18 V, VI = 6.5 V 6
Input current INB- I(INB-) -15 1 15 nA VDD = 1.8 V and 18 V, VI = 0.1 V 6
Low-level output voltage VOL 250 mV VDD = 1.8 V, IO = 3 mA 6
Open-drain output leakage current Ilkg(OD) 300 nA VDD = 1.8 V and 18 V, VO = VDD 6
Supply current IDD 5.5 11 µA VDD = 1.8 V, no load 6
Supply current IDD 6 13 µA VDD = 5 V 6
Supply current IDD 7 13 µA VDD = 18 V 6
Start-up delay 150 450 µs 6
Undervoltage lockout UVLO 1.3 1.7 V VDD falling 6
Power-on reset voltage V(POR) 0.8 V VOLmax = 0.2 V, I(OUTA/B) = 15 µA 6
High-to-low propagation delay tPHL 18 µs VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VOH = 0.9 × VDD, VOL = 400 mV 7
Low-to-high propagation delay tPLH 29 µs VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VOH = 0.9 × VDD, VOL = 400 mV 7
Output rise time tr 2.2 µs VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VO = (0.1 to 0.9) × VDD 7
Output fall time tf 0.22 µs VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VO = (0.1 to 0.9) × VDD 7
Supply voltage VDD 1.8 18 V 5
Input voltage INA+, INB- VI 0 6.5 V 5
Output voltage OUTA, OUTB VO 0 18 V 5
VDD voltage VDD -0.3 20 V 5
OUTA, OUTB voltage -0.3 20 V 5
INA+, INB- voltage -0.3 7 V 5
Output terminal current 40 mA 5
Operating junction temperature TJ -40 125 °C 5
Storage temperature Tstg -65 150 °C 5
ESD HBM V(ESD) -2500 2500 V Human body model, per AEC Q100-002 5
ESD CDM V(ESD) -1000 1000 V Charged-device model, per AEC Q100-011 5
Junction-to-ambient thermal resistance RθJA 204.6 °C/W DDC (SOT), 6 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 50.5 °C/W DDC (SOT), 6 pins 5
Junction-to-board thermal resistance RθJB 54.3 °C/W DDC (SOT), 6 pins 5
Junction-to-top characterization parameter ψJT 0.8 °C/W DDC (SOT), 6 pins 5
Junction-to-board characterization parameter ψJB 52.8 °C/W DDC (SOT), 6 pins 5

CAD (KiCad official)

  • Symbol: TLV6700QDDCRQ1
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tlv6700qddcrq1-etched.step / tlv6700qddcrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv6700qddcrq1.step / tlv6700qddcrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 748784285036c278, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF