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TLV62130RGTT
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Texas Instruments DC-DC Converters, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+54@@ -0,0 +1,54 @@+# TLV62130RGTT++**Texas Instruments** · DC-DC Converters · VQFN-16-EP(3x3)++TLV62130RGTT from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SW | output | Switch node connected to internal MOSFET switches; connect inductor between this node and output capacitor. |+| 2 | SW | output | Switch node connected to internal MOSFET switches; connect inductor between this node and output capacitor. |+| 3 | SW | output | Switch node connected to internal MOSFET switches; connect inductor between this node and output capacitor. |+| 4 | PG | output | Open-drain power good output; high = VOUT ready, low = VOUT below nominal regulation; maximum sink current 2 mA at 0.3 V output low. |+| 5 | FB | input | Voltage feedback input for output regulation via resistive divider; regulated to 0.8 V nominal setpoint; maximum leakage 100 nA. |+| 6 | AGND | power_in | Analog ground reference; must be connected directly to exposed thermal pad and common ground plane. |+| 7 | FSW | input | Switching frequency select input; low ≈ 2.5 MHz, high ≈ 1.25 MHz typical operation; logic thresholds 0.3 V low, 0.9 V high. |+| 8 | DEF | input | Output voltage scaling input; low = nominal voltage, high = nominal + 5%; logic thresholds 0.3 V low, 0.9 V high; internal pull-down 400 kΩ. |+| 9 | SS/TR | input | Soft-start and tracking pin; external capacitor controls output voltage ramp time with 2.5 µA source current. |+| 10 | AVIN | power_in | Analog supply voltage input for control circuitry; connect to same source as PVIN; operating range 3 V to 17 V. |+| 11 | PVIN | power_in | Power supply voltage input for power stage; connect to same source as AVIN; operating range 3 V to 17 V. |+| 12 | PVIN | power_in | Power supply voltage input for power stage; connect to same source as AVIN; operating range 3 V to 17 V. |+| 13 | EN | input | Enable control input; high = enabled, low = disabled; logic thresholds 0.3 V low, 0.9 V high; internal pull-down 400 kΩ. |+| 14 | VOS | input | Output voltage sense input for control loop feedback; connect to VOUT at output capacitor with short, isolated trace. |+| 15 | PGND | power_in | Power ground reference; must be connected directly to exposed thermal pad and common ground plane. |+| 16 | PGND | power_in | Power ground reference; must be connected directly to exposed thermal pad and common ground plane. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-16-EP(3x3) |+| Category | Power Management (PMIC) |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `TLV62130RGTT`+- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`+- 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)+- 3D model files: `tlv62130rgtt-etched.step` / `tlv62130rgtt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv62130rgtt.step` / `tlv62130rgtt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv62130) (41 pp, sha256 `0065382c4a9061fe`, retrieved 2026-09-24, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlv62130rgtt-datasheet.pdf)
page.jsonadded+197@@ -0,0 +1,197 @@+{+ "slug": "tlv62130rgtt",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tlv62130rgtt",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tlv62130rgtt.kicad_sym",+ "tlv62130rgtt.kicad_mod",+ "tlv62130rgtt.glb",+ "tlv62130rgtt.step",+ "tlv62130rgtt.lbr",+ "docs/hero.png",+ "docs/tlv62130rgtt-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "TLV62130RGTT",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-16-EP(3x3)",+ "pin_count": 17,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tlv62130",+ "parts": {+ "symbol": "tlv62130rgtt.kicad_sym",+ "footprint": "tlv62130rgtt.kicad_mod",+ "model_3d": "tlv62130rgtt-etched.glb",+ "model_3d_plain": "tlv62130rgtt.glb",+ "model_3d_step": "tlv62130rgtt-etched.step",+ "model_3d_step_plain": "tlv62130rgtt.step",+ "lbr": "tlv62130rgtt.lbr"+ },+ "distributor_links": {+ "lcsc": "C2876760"+ },+ "pins": [+ {+ "number": "1",+ "name": "SW",+ "type": "output",+ "description": "Switch node connected to internal MOSFET switches; connect inductor between this node and output capacitor."+ },+ {+ "number": "2",+ "name": "SW",+ "type": "output",+ "description": "Switch node connected to internal MOSFET switches; connect inductor between this node and output capacitor."+ },+ {+ "number": "3",+ "name": "SW",+ "type": "output",+ "description": "Switch node connected to internal MOSFET switches; connect inductor between this node and output capacitor."+ },+ {+ "number": "4",+ "name": "PG",+ "type": "output",+ "description": "Open-drain power good output; high = VOUT ready, low = VOUT below nominal regulation; maximum sink current 2 mA at 0.3 V output low."+ },+ {+ "number": "5",+ "name": "FB",+ "type": "input",+ "description": "Voltage feedback input for output regulation via resistive divider; regulated to 0.8 V nominal setpoint; maximum leakage 100 nA."+ },+ {+ "number": "6",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference; must be connected directly to exposed thermal pad and common ground plane."+ },+ {+ "number": "7",+ "name": "FSW",+ "type": "input",+ "description": "Switching frequency select input; low ≈ 2.5 MHz, high ≈ 1.25 MHz typical operation; logic thresholds 0.3 V low, 0.9 V high."+ },+ {+ "number": "8",+ "name": "DEF",+ "type": "input",+ "description": "Output voltage scaling input; low = nominal voltage, high = nominal + 5%; logic thresholds 0.3 V low, 0.9 V high; internal pull-down 400 kΩ."+ },+ {+ "number": "9",+ "name": "SS/TR",+ "type": "input",+ "description": "Soft-start and tracking pin; external capacitor controls output voltage ramp time with 2.5 µA source current."+ },+ {+ "number": "10",+ "name": "AVIN",+ "type": "power_in",+ "description": "Analog supply voltage input for control circuitry; connect to same source as PVIN; operating range 3 V to 17 V."+ },+ {+ "number": "11",+ "name": "PVIN",+ "type": "power_in",+ "description": "Power supply voltage input for power stage; connect to same source as AVIN; operating range 3 V to 17 V."+ },+ {+ "number": "12",+ "name": "PVIN",+ "type": "power_in",+ "description": "Power supply voltage input for power stage; connect to same source as AVIN; operating range 3 V to 17 V."+ },+ {+ "number": "13",+ "name": "EN",+ "type": "input",+ "description": "Enable control input; high = enabled, low = disabled; logic thresholds 0.3 V low, 0.9 V high; internal pull-down 400 kΩ."+ },+ {+ "number": "14",+ "name": "VOS",+ "type": "input",+ "description": "Output voltage sense input for control loop feedback; connect to VOUT at output capacitor with short, isolated trace."+ },+ {+ "number": "15",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground reference; must be connected directly to exposed thermal pad and common ground plane."+ },+ {+ "number": "16",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground reference; must be connected directly to exposed thermal pad and common ground plane."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 17 added from the footprint"+ ],+ "pages_sent": 41,+ "cost_usd": 0.4179,+ "at": "2026-09-24T03:22:16"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tlv62130",+ "pages": 41,+ "sha256": "0065382c4a9061fe",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}